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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.235 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.235; helo=mail.nvidia.com; Received: from mail.nvidia.com (12.22.5.235) by BN8NAM11FT056.mail.protection.outlook.com (10.13.177.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5061.22 via Frontend Transport; Mon, 14 Mar 2022 01:46:26 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Mon, 14 Mar 2022 01:46:16 +0000 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Sun, 13 Mar 2022 18:46:13 -0700 From: Yajun Wu To: , , , , Maxime Coquelin CC: , , , , Subject: [PATCH] vdpa/mlx5: workaround var offset within page Date: Mon, 14 Mar 2022 03:44:12 +0200 Message-ID: <20220314014414.251869-1-yajunw@nvidia.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 70b6b3f1-c453-4f42-c0a4-08da055c7436 X-MS-TrafficTypeDiagnostic: BL1PR12MB5078:EE_ X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Mar 2022 01:46:26.9503 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 70b6b3f1-c453-4f42-c0a4-08da055c7436 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.235]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT056.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5078 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org vDPA driver first uses kernel driver to allocate doorbell(VAR) area for each device. Then uses var->mmap_off and var->length to mmap uverbs device file as doorbell userspace virtual address. Current kernel driver provides var->mmap_off equal to page start of VAR. It's fine with x86 4K page server, because VAR physical address is only 4K aligned thus locate in 4K page start. But with aarch64 64K page server, the actual VAR physical address has offset within page(not locate in 64K page start). So vDPA driver need add this within page offset(caps.doorbell_bar_offset) to get right VAR virtual address. Fixes: 62c813706e4 ("vdpa/mlx5: map doorbell") Cc: stable@dpdk.org Signed-off-by: Yajun Wu Acked-by: Matan Azrad --- drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c index 3416797d28..0748710a76 100644 --- a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c +++ b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c @@ -9,6 +9,7 @@ #include #include #include +#include #include @@ -123,7 +124,10 @@ mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv) priv->td = NULL; } if (priv->virtq_db_addr) { - claim_zero(munmap(priv->virtq_db_addr, priv->var->length)); + /* Mask out the within page offset for ummap. */ + claim_zero(munmap((void *)((uint64_t)priv->virtq_db_addr & + ~(rte_mem_page_size() - 1ULL)), + priv->var->length)); priv->virtq_db_addr = NULL; } priv->features = 0; @@ -486,6 +490,10 @@ mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv) priv->virtq_db_addr = NULL; goto error; } else { + /* Add within page offset for 64K page system. */ + priv->virtq_db_addr = (char *)priv->virtq_db_addr + + ((rte_mem_page_size() - 1) & + priv->caps.doorbell_bar_offset); DRV_LOG(DEBUG, "VAR address of doorbell mapping is %p.", priv->virtq_db_addr); } -- 2.27.0