From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AB35DA0503; Tue, 29 Mar 2022 04:29:49 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1D6E64288B; Tue, 29 Mar 2022 04:29:49 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 455FC42889 for ; Tue, 29 Mar 2022 04:29:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648520987; x=1680056987; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xN6isTbvpfIHXEM2zo877zYNFoFK6HHHSezVNfdPMKA=; b=hhE81DGZHxI+mm3d6495lUaodes9YLmnQ6c5Ksdx5jMP/dx/gjbvTPIh Mvhu9ipU3RLI5fuIqHhTacdceMORTT0W2Ycut7q37YZmKaB2kARmNiPgA //zOHIHzopqqIPjAhp/ZJig77Y1cdT6kFTD/FfFZjpvOB326VQN3XNfhn 5kvOagHuw+f9XBLLJohR6yLzsPrAow9omJGOZCZgIvlGIrklAFBDbjLvc 23HZQaIHP+Yyi1jWK+I7f3aAjteqg/N592OlTimcO5JHJBsNj3kuu/h63 uivlM7V5HviW8T2EUoSBt0d2ipUpyg+0dMBBRr4eL3+SpZPI4+zY7/qCw g==; X-IronPort-AV: E=McAfee;i="6200,9189,10300"; a="257973865" X-IronPort-AV: E=Sophos;i="5.90,219,1643702400"; d="scan'208";a="257973865" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Mar 2022 19:29:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,219,1643702400"; d="scan'208";a="546193903" Received: from npg-wuwenjun-dpdk-01.sh.intel.com ([10.67.110.181]) by orsmga007.jf.intel.com with ESMTP; 28 Mar 2022 19:29:44 -0700 From: Wenjun Wu To: dev@dpdk.org, jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com Cc: Wenjun Wu , Ting Xu Subject: [PATCH v1 1/3] common/iavf: support queue rate limit and quanta size configuration Date: Tue, 29 Mar 2022 10:07:15 +0800 Message-Id: <20220329020717.1101263-2-wenjun1.wu@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220329020717.1101263-1-wenjun1.wu@intel.com> References: <20220329020717.1101263-1-wenjun1.wu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds new virtchnl opcodes and structures for rate limit and quanta size configuration, which include: 1. VIRTCHNL_OP_CONFIG_QUEUE_BW, to configure max bandwidth for each VF per queue. 2. VIRTCHNL_OP_CONFIG_QUANTA, to configure quanta size per queue. Signed-off-by: Ting Xu Signed-off-by: Wenjun Wu --- drivers/common/iavf/virtchnl.h | 51 ++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h index 3e44eca7d8..0d51055ae2 100644 --- a/drivers/common/iavf/virtchnl.h +++ b/drivers/common/iavf/virtchnl.h @@ -164,6 +164,8 @@ enum virtchnl_ops { VIRTCHNL_OP_ENABLE_QUEUES_V2 = 107, VIRTCHNL_OP_DISABLE_QUEUES_V2 = 108, VIRTCHNL_OP_MAP_QUEUE_VECTOR = 111, + VIRTCHNL_OP_CONFIG_QUEUE_BW = 112, + VIRTCHNL_OP_CONFIG_QUANTA = 113, VIRTCHNL_OP_MAX, }; @@ -1872,6 +1874,22 @@ struct virtchnl_queue_tc_mapping { VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_queue_tc_mapping); +/* VIRTCHNL_OP_CONFIG_QUEUE_BW */ +struct virtchnl_queue_bw { + u16 queue_id; + u8 pad[2]; + struct virtchnl_shaper_bw shaper; +}; + +VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_queue_bw); + +struct virtchnl_queues_bw_cfg { + u16 vsi_id; + u16 num_queues; + struct virtchnl_queue_bw cfg[1]; +}; + +VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_queues_bw_cfg); /* TX and RX queue types are valid in legacy as well as split queue models. * With Split Queue model, 2 additional types are introduced - TX_COMPLETION @@ -1978,6 +1996,12 @@ struct virtchnl_queue_vector_maps { VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_queue_vector_maps); +struct virtchnl_quanta_cfg { + u16 quanta_size; + struct virtchnl_queue_chunk queue_select; +}; + +VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_quanta_cfg); /* Since VF messages are limited by u16 size, precalculate the maximum possible * values of nested elements in virtchnl structures that virtual channel can @@ -2244,6 +2268,33 @@ virtchnl_vc_validate_vf_msg(struct virtchnl_version_info *ver, u32 v_opcode, sizeof(q_tc->tc[0]); } break; + case VIRTCHNL_OP_CONFIG_QUEUE_BW: + valid_len = sizeof(struct virtchnl_queues_bw_cfg); + if (msglen >= valid_len) { + struct virtchnl_queues_bw_cfg *q_bw = + (struct virtchnl_queues_bw_cfg *)msg; + if (q_bw->num_queues == 0) { + err_msg_format = true; + break; + } + valid_len += (q_bw->num_queues - 1) * + sizeof(q_bw->cfg[0]); + } + break; + case VIRTCHNL_OP_CONFIG_QUANTA: + valid_len = sizeof(struct virtchnl_quanta_cfg); + if (msglen >= valid_len) { + struct virtchnl_quanta_cfg *q_quanta = + (struct virtchnl_quanta_cfg *)msg; + if (q_quanta->quanta_size == 0 || + q_quanta->queue_select.num_queues == 0) { + err_msg_format = true; + break; + } + valid_len += (q_quanta->queue_select.num_queues - 1) * + sizeof(struct virtchnl_queue_chunk); + } + break; case VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS: break; case VIRTCHNL_OP_ADD_VLAN_V2: -- 2.25.1