DPDK patches and discussions
 help / color / mirror / Atom feed
From: Ciara Power <ciara.power@intel.com>
To: dev@dpdk.org
Cc: roy.fan.zhang@intel.com, kai.ji@intel.com,
	Ciara Power <ciara.power@intel.com>,
	Pablo de Lara <pablo.de.lara.guarch@intel.com>
Subject: [PATCH 2/3] crypto/ipsec_mb: add chachapoly SGL support to aesni_mb
Date: Thu,  7 Apr 2022 10:30:40 +0000	[thread overview]
Message-ID: <20220407103041.4037942-3-ciara.power@intel.com> (raw)
In-Reply-To: <20220407103041.4037942-1-ciara.power@intel.com>

Add SGL support for chacha20_poly1305 algorithm through JOB API.

Supports IN-PLACE SGL, OOP SGL IN and LB OUT,
and OOP SGL IN and SGL OUT.

Feature flags not added, as the PMD does not support SGL for all
other algorithms.

Signed-off-by: Ciara Power <ciara.power@intel.com>
---
 drivers/crypto/ipsec_mb/pmd_aesni_mb.c      | 9 ++++++++-
 drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h | 5 ++++-
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
index 09a0cc5ace..606c8a0caf 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
@@ -1289,6 +1289,12 @@ set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp,
 		job->u.CHACHA20_POLY1305.aad = op->sym->aead.aad.data;
 		job->u.CHACHA20_POLY1305.aad_len_in_bytes =
 			session->aead.aad_len;
+		if (sgl) {
+			job->u.CHACHA20_POLY1305.ctx =
+					&session->aead.chacha_sgl_ctx;
+			job->cipher_mode = IMB_CIPHER_CHACHA20_POLY1305_SGL;
+			job->hash_alg = IMB_AUTH_CHACHA20_POLY1305_SGL;
+		}
 		job->enc_keys = session->cipher.expanded_aes_keys.encode;
 		job->dec_keys = session->cipher.expanded_aes_keys.encode;
 		break;
@@ -1394,6 +1400,7 @@ set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp,
 		break;
 
 	case IMB_AUTH_GCM_SGL:
+	case IMB_AUTH_CHACHA20_POLY1305_SGL:
 		job->hash_start_src_offset_in_bytes = 0;
 		job->msg_len_to_hash_in_bytes = 0;
 		job->iv = rte_crypto_op_ctod_offset(op, uint8_t *,
@@ -1405,7 +1412,6 @@ set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp,
 			op->sym->aead.data.offset;
 		job->msg_len_to_hash_in_bytes =
 					op->sym->aead.data.length;
-
 		job->iv = rte_crypto_op_ctod_offset(op, uint8_t *,
 				session->iv.offset);
 		break;
@@ -1491,6 +1497,7 @@ set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp,
 		job->msg_len_to_cipher_in_bytes = op->sym->aead.data.length;
 		break;
 	case IMB_CIPHER_GCM_SGL:
+	case IMB_CIPHER_CHACHA20_POLY1305_SGL:
 		job->msg_len_to_cipher_in_bytes = 0;
 		job->cipher_start_src_offset_in_bytes = 0;
 		break;
diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
index 1d1e9dde00..f7fce7c39f 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
@@ -947,7 +947,10 @@ struct aesni_mb_session {
 		/* * AAD data length */
 		uint16_t aad_len;
 
-		struct gcm_context_data gcm_sgl_ctx;
+		union {
+			struct gcm_context_data gcm_sgl_ctx;
+			struct chacha20_poly1305_context_data chacha_sgl_ctx;
+		};
 	} aead;
 } __rte_cache_aligned;
 
-- 
2.25.1


  parent reply	other threads:[~2022-04-07 10:31 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-07 10:30 [PATCH 0/3] add partial SGL support to AESNI_MB Ciara Power
2022-04-07 10:30 ` [PATCH 1/3] crypto/ipsec_mb: add GCM sgl support to aesni_mb Ciara Power
2022-05-08 14:39   ` De Lara Guarch, Pablo
2022-05-11 12:35     ` Power, Ciara
2022-04-07 10:30 ` Ciara Power [this message]
2022-04-07 10:30 ` [PATCH 3/3] crypto/ipsec_mb: check SGL support for algorithm Ciara Power
2022-05-08 14:39   ` De Lara Guarch, Pablo
2022-05-02  9:48 ` [EXT] [PATCH 0/3] add partial SGL support to AESNI_MB Akhil Goyal
2022-05-05 14:47   ` De Lara Guarch, Pablo
2022-05-11 12:30 ` [PATCH v2 0/2] " Ciara Power
2022-05-11 12:30   ` [PATCH v2 1/2] crypto/ipsec_mb: add GCM SGL support to aesni-mb Ciara Power
2022-05-11 12:30   ` [PATCH v2 2/2] crypto/ipsec_mb: add chachapoly " Ciara Power
2022-05-11 15:44   ` [PATCH v2 0/2] add partial SGL support to AESNI_MB De Lara Guarch, Pablo
2022-05-26 16:13   ` [EXT] " Akhil Goyal

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220407103041.4037942-3-ciara.power@intel.com \
    --to=ciara.power@intel.com \
    --cc=dev@dpdk.org \
    --cc=kai.ji@intel.com \
    --cc=pablo.de.lara.guarch@intel.com \
    --cc=roy.fan.zhang@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).