From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C5EFAA050B; Thu, 7 Apr 2022 12:31:27 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0F29F42802; Thu, 7 Apr 2022 12:31:17 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id 81D4C410DD for ; Thu, 7 Apr 2022 12:31:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1649327473; x=1680863473; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rpu2kLMFUxgHSGuLynyqZ4pmgkXsXF8PB8BkxyFCMDQ=; b=c0etJ9EfnHA9hoMqZ8QfGnfl/agnchMroZmu3xpdpSJgKHZcl3QoA2co IDnPpV11KDrcBn+7D7Dp2Daaz4e0idO7AYmgjiK83QGaohmAZI+ChJoih 33MKL99V/WLRQwFbN1qgD7ypoPF7nptJcrmBLxRnQ3+6Krevcjw6cT4Ht 06J/accULEbBmD0MMqf17xVnG115DlwPIRzH2hKPy1CtfW7k4jwsaY7BO c7cFnTRjfYeUuVcbHK7UzF7uNdgyTqgVtBFAgUCrZMmwLXCYQ6v8SjiUy te17BHHbth61hhXYLwKbB0LWqwRHsuM2H6fgAux67ISyjbNmfyZdmvb/5 Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10309"; a="258880019" X-IronPort-AV: E=Sophos;i="5.90,241,1643702400"; d="scan'208";a="258880019" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Apr 2022 03:31:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,241,1643702400"; d="scan'208";a="549988971" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.49]) by orsmga007.jf.intel.com with ESMTP; 07 Apr 2022 03:31:11 -0700 From: Ciara Power To: dev@dpdk.org Cc: roy.fan.zhang@intel.com, kai.ji@intel.com, Ciara Power , Pablo de Lara Subject: [PATCH 3/3] crypto/ipsec_mb: check SGL support for algorithm Date: Thu, 7 Apr 2022 10:30:41 +0000 Message-Id: <20220407103041.4037942-4-ciara.power@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220407103041.4037942-1-ciara.power@intel.com> References: <20220407103041.4037942-1-ciara.power@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds a check when dequeueing ops and processing, SGL support only exists for AES-GCM and CHACHA20_POLY1305 algorithms. If an SGL op for an unsupported algorithm is being processed, submit a NULL job instead. Signed-off-by: Ciara Power --- drivers/crypto/ipsec_mb/pmd_aesni_mb.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c index 606c8a0caf..9b21c14f58 100644 --- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c +++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c @@ -1202,6 +1202,13 @@ set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp, if (op->sym->m_src->nb_segs > 1) sgl = 1; + if (sgl && (session->cipher.mode != IMB_CIPHER_GCM + && session->cipher.mode != IMB_CIPHER_CHACHA20_POLY1305)) { + op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; + IPSEC_MB_LOG(ERR, "Device only supports SGL for AES-GCM or CHACHA20_POLY1305 algorithms."); + return -1; + } + /* Set crypto operation */ job->chain_order = session->chain_order; -- 2.25.1