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From: Srikanth Yalavarthi <syalavarthi@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
	Kiran Kumar K <kirankumark@marvell.com>,
	Sunil Kumar Kori <skori@marvell.com>,
	Satha Rao <skoteshwar@marvell.com>
Cc: <dev@dpdk.org>, <jerinj@marvell.com>, <sshankarnara@marvell.com>,
	"Srikanth Yalavarthi" <syalavarthi@marvell.com>
Subject: [PATCH 1/1] common/cnxk: added new macros to platform layer
Date: Tue, 12 Apr 2022 10:42:24 -0700
Message-ID: <20220412174224.13143-1-syalavarthi@marvell.com> (raw)

Added new macros for pointer operations, bitwise operations,
spinlocks and 32 bit read and write.

Signed-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>
---
 drivers/common/cnxk/roc_bits.h     | 12 ++++++++++++
 drivers/common/cnxk/roc_platform.h | 28 +++++++++++++++++++---------
 2 files changed, 31 insertions(+), 9 deletions(-)

diff --git a/drivers/common/cnxk/roc_bits.h b/drivers/common/cnxk/roc_bits.h
index 11216d9d63..ce3dffa08d 100644
--- a/drivers/common/cnxk/roc_bits.h
+++ b/drivers/common/cnxk/roc_bits.h
@@ -29,4 +29,16 @@
 	 (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
 #endif
 
+#ifndef IS_BIT_SET
+#define IS_BIT_SET(num, n) ((num) & (1 << (n)))
+#endif
+
+#ifndef SET_BIT
+#define SET_BIT(num, n) ((num) | (1 << (n)))
+#endif
+
+#ifndef CLEAR_BIT
+#define CLEAR_BIT(num, n) ((num) &= ~((1) << (n)))
+#endif
+
 #endif /* _ROC_BITS_H_ */
diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
index 28004b1743..3671e55c23 100644
--- a/drivers/common/cnxk/roc_platform.h
+++ b/drivers/common/cnxk/roc_platform.h
@@ -41,6 +41,7 @@
 #define PLT_MEMZONE_NAMESIZE	 RTE_MEMZONE_NAMESIZE
 #define PLT_STD_C11		 RTE_STD_C11
 #define PLT_PTR_ADD		 RTE_PTR_ADD
+#define PLT_PTR_SUB		 RTE_PTR_SUB
 #define PLT_PTR_DIFF		 RTE_PTR_DIFF
 #define PLT_MAX_RXTX_INTR_VEC_ID RTE_MAX_RXTX_INTR_VEC_ID
 #define PLT_INTR_VEC_RXTX_OFFSET RTE_INTR_VEC_RXTX_OFFSET
@@ -70,12 +71,16 @@
 #define PLT_U32_CAST(val) ((uint32_t)(val))
 #define PLT_U16_CAST(val) ((uint16_t)(val))
 
+/* Add / Sub pointer with scalar and cast to uint64_t */
+#define PLT_PTR_ADD_U64_CAST(__ptr, __x) PLT_U64_CAST(PLT_PTR_ADD(__ptr, __x))
+#define PLT_PTR_SUB_U64_CAST(__ptr, __x) PLT_U64_CAST(PLT_PTR_SUB(__ptr, __x))
+
 /** Divide ceil */
-#define PLT_DIV_CEIL(x, y)			\
-	({					\
-		__typeof(x) __x = x;		\
-		__typeof(y) __y = y;		\
-		(__x + __y - 1) / __y;		\
+#define PLT_DIV_CEIL(x, y)                                                     \
+	({                                                                     \
+		__typeof(x) __x = x;                                           \
+		__typeof(y) __y = y;                                           \
+		(__x + __y - 1) / __y;                                         \
 	})
 
 #define __plt_cache_aligned __rte_cache_aligned
@@ -113,10 +118,11 @@
 #define plt_bitmap_scan			rte_bitmap_scan
 #define plt_bitmap_get_memory_footprint rte_bitmap_get_memory_footprint
 
-#define plt_spinlock_t	    rte_spinlock_t
-#define plt_spinlock_init   rte_spinlock_init
-#define plt_spinlock_lock   rte_spinlock_lock
-#define plt_spinlock_unlock rte_spinlock_unlock
+#define plt_spinlock_t	     rte_spinlock_t
+#define plt_spinlock_init    rte_spinlock_init
+#define plt_spinlock_lock    rte_spinlock_lock
+#define plt_spinlock_unlock  rte_spinlock_unlock
+#define plt_spinlock_trylock rte_spinlock_trylock
 
 #define plt_intr_callback_register   rte_intr_callback_register
 #define plt_intr_callback_unregister rte_intr_callback_unregister
@@ -165,6 +171,10 @@
 #define plt_write64(val, addr)                                                 \
 	rte_write64_relaxed((val), (volatile void *)(addr))
 
+#define plt_read32(addr) rte_read32_relaxed((volatile void *)(addr))
+#define plt_write32(val, addr)                                                 \
+	rte_write32_relaxed((val), (volatile void *)(addr))
+
 #define plt_wmb()		rte_wmb()
 #define plt_rmb()		rte_rmb()
 #define plt_io_wmb()		rte_io_wmb()
-- 
2.17.1


             reply	other threads:[~2022-04-12 17:42 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-12 17:42 Srikanth Yalavarthi [this message]
2022-04-13  7:08 ` Morten Brørup
2022-05-14 12:20 ` Jerin Jacob
2022-05-16 17:20 ` [PATCH v2 1/1] common/cnxk: added additional platform macros Srikanth Yalavarthi
2022-05-16 17:26 ` [PATCH v2 1/1] common/cnxk: added new macros to platform layer Srikanth Yalavarthi
2022-06-13  8:23   ` Jerin Jacob

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