From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D8DE0A00BE; Wed, 20 Apr 2022 10:17:25 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 81AE7427EF; Wed, 20 Apr 2022 10:17:12 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mails.dpdk.org (Postfix) with ESMTP id 73282427FE for ; Wed, 20 Apr 2022 10:17:11 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DFDE31424; Wed, 20 Apr 2022 01:17:10 -0700 (PDT) Received: from net-x86-dell-8268.shanghai.arm.com (net-x86-dell-8268.shanghai.arm.com [10.169.210.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AAE6B3F73B; Wed, 20 Apr 2022 01:17:08 -0700 (PDT) From: Feifei Wang To: Beilei Xing Cc: dev@dpdk.org, nd@arm.com, Feifei Wang , Honnappa Nagarahalli , Ruifeng Wang Subject: [PATCH v1 4/5] net/i40e: add direct rearm mode internal API Date: Wed, 20 Apr 2022 16:16:49 +0800 Message-Id: <20220420081650.2043183-5-feifei.wang2@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220420081650.2043183-1-feifei.wang2@arm.com> References: <20220420081650.2043183-1-feifei.wang2@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org For direct rearm mode, add two internal functions. One is to enable direct rearm mode in Rx queue. The other is to map Tx queue with Rx queue to make Rx queue take buffers from the specific Tx queue. Suggested-by: Honnappa Nagarahalli Signed-off-by: Feifei Wang Reviewed-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli --- drivers/net/i40e/i40e_ethdev.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 755786dc10..9e1a523bcc 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -369,6 +369,13 @@ static int i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, static int i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id); +static int i40e_dev_rx_queue_direct_rearm_enable(struct rte_eth_dev *dev, + uint16_t queue_id); +static int i40e_dev_rx_queue_direct_rearm_map(struct rte_eth_dev *dev, + uint16_t rx_queue_id, + uint16_t tx_port_id, + uint16_t tx_queue_id); + static int i40e_get_regs(struct rte_eth_dev *dev, struct rte_dev_reg_info *regs); @@ -477,6 +484,8 @@ static const struct eth_dev_ops i40e_eth_dev_ops = { .rx_queue_setup = i40e_dev_rx_queue_setup, .rx_queue_intr_enable = i40e_dev_rx_queue_intr_enable, .rx_queue_intr_disable = i40e_dev_rx_queue_intr_disable, + .rx_queue_direct_rearm_enable = i40e_dev_rx_queue_direct_rearm_enable, + .rx_queue_direct_rearm_map = i40e_dev_rx_queue_direct_rearm_map, .rx_queue_release = i40e_dev_rx_queue_release, .tx_queue_setup = i40e_dev_tx_queue_setup, .tx_queue_release = i40e_dev_tx_queue_release, @@ -11108,6 +11117,31 @@ i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) return 0; } +static int i40e_dev_rx_queue_direct_rearm_enable(struct rte_eth_dev *dev, + uint16_t queue_id) +{ + struct i40e_rx_queue *rxq; + + rxq = dev->data->rx_queues[queue_id]; + rxq->direct_rxrearm_enable = 1; + + return 0; +} + +static int i40e_dev_rx_queue_direct_rearm_map(struct rte_eth_dev *dev, + uint16_t rx_queue_id, uint16_t tx_port_id, + uint16_t tx_queue_id) +{ + struct i40e_rx_queue *rxq; + + rxq = dev->data->rx_queues[rx_queue_id]; + + rxq->direct_rxrearm_port = tx_port_id; + rxq->direct_rxrearm_queue = tx_queue_id; + + return 0; +} + /** * This function is used to check if the register is valid. * Below is the valid registers list for X722 only: -- 2.25.1