From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8D824A00C3; Thu, 21 Apr 2022 05:29:02 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A3C3F42802; Thu, 21 Apr 2022 05:28:47 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mails.dpdk.org (Postfix) with ESMTP id 09E8842802 for ; Thu, 21 Apr 2022 05:28:45 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650511726; x=1682047726; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dLKX37gS1206cioWVBqfGwz/j8mhjpQJ9dr5nxf3o+E=; b=SuBUu9Eg8sxsAMm7mhSOYDO6T9uEyt88lPJCD3viMWURTvgXB9NdLSaL FvBtS0nvpN0VcOJE9lZmCkmvIVtS8VVFrttiBzvudP0PznRTBfJkJspYB D6lw1KFP+XGx/tEcpDx38vcuLPE5B4cjQcuub46MJa3HlnZ47+QulTJoE 2RpWz5ibQuzeV8qKt8RKpsCnM8t+BzriwJUY+m7mCBUsEALAr/GeQzhyP Mkvj+ivsqja2rzf9nKilTBOoCm7pOkzVxhbg7UjpL3x3y3f451KU97vrI eDG8Yc8LqjbmSWT8+hp7V1GfznBvLo+z+fIha7fJnYr1tHxrZtHcqHW8k w==; X-IronPort-AV: E=McAfee;i="6400,9594,10323"; a="244157837" X-IronPort-AV: E=Sophos;i="5.90,277,1643702400"; d="scan'208";a="244157837" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2022 20:28:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,277,1643702400"; d="scan'208";a="576972854" Received: from dpdk-jf-ntb-v2.sh.intel.com ([10.67.119.111]) by orsmga008.jf.intel.com with ESMTP; 20 Apr 2022 20:28:42 -0700 From: Junfeng Guo To: qi.z.zhang@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com Cc: dev@dpdk.org, ting.xu@intel.com, junfeng.guo@intel.com Subject: [PATCH v4 4/4] net/iavf: support Protocol Agnostic Flow Offloading VF RSS Date: Thu, 21 Apr 2022 11:28:51 +0800 Message-Id: <20220421032851.1355350-5-junfeng.guo@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220421032851.1355350-1-junfeng.guo@intel.com> References: <20220408091218.240922-4-junfeng.guo@intel.com> <20220421032851.1355350-1-junfeng.guo@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Ting Xu Enable Protocol Agnostic Flow Offloading RSS hash for VF. Signed-off-by: Ting Xu --- drivers/net/iavf/iavf_hash.c | 96 ++++++++++++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/drivers/net/iavf/iavf_hash.c b/drivers/net/iavf/iavf_hash.c index 278e75117d..42df7c4e48 100644 --- a/drivers/net/iavf/iavf_hash.c +++ b/drivers/net/iavf/iavf_hash.c @@ -37,6 +37,8 @@ /* L2TPv2 */ #define IAVF_PHINT_L2TPV2 BIT_ULL(9) #define IAVF_PHINT_L2TPV2_LEN BIT_ULL(10) +/* Raw */ +#define IAVF_PHINT_RAW BIT_ULL(11) #define IAVF_PHINT_GTPU_MSK (IAVF_PHINT_GTPU | \ IAVF_PHINT_GTPU_EH | \ @@ -58,6 +60,7 @@ struct iavf_hash_match_type { struct iavf_rss_meta { struct virtchnl_proto_hdrs proto_hdrs; enum virtchnl_rss_algorithm rss_algorithm; + bool raw_ena; }; struct iavf_hash_flow_cfg { @@ -532,6 +535,7 @@ struct virtchnl_proto_hdrs ipv6_l2tpv2_ppp_tmplt = { */ static struct iavf_pattern_match_item iavf_hash_pattern_list[] = { /* IPv4 */ + {iavf_pattern_raw, IAVF_INSET_NONE, NULL}, {iavf_pattern_eth_ipv4, IAVF_RSS_TYPE_OUTER_IPV4, &outer_ipv4_tmplt}, {iavf_pattern_eth_ipv4_udp, IAVF_RSS_TYPE_OUTER_IPV4_UDP, &outer_ipv4_udp_tmplt}, {iavf_pattern_eth_ipv4_tcp, IAVF_RSS_TYPE_OUTER_IPV4_TCP, &outer_ipv4_tcp_tmplt}, @@ -804,6 +808,9 @@ iavf_hash_parse_pattern(const struct rte_flow_item pattern[], uint64_t *phint, } switch (item->type) { + case RTE_FLOW_ITEM_TYPE_RAW: + *phint |= IAVF_PHINT_RAW; + break; case RTE_FLOW_ITEM_TYPE_IPV4: if (!(*phint & IAVF_PHINT_GTPU_MSK) && !(*phint & IAVF_PHINT_GRE) && @@ -873,6 +880,80 @@ iavf_hash_parse_pattern(const struct rte_flow_item pattern[], uint64_t *phint, return 0; } +static int +iavf_hash_parse_raw_pattern(const struct rte_flow_item *item, + struct iavf_rss_meta *meta) +{ + const struct rte_flow_item_raw *raw_spec, *raw_mask; + uint8_t *pkt_buf, *msk_buf; + uint8_t spec_len, pkt_len; + uint8_t tmp_val = 0; + uint8_t tmp_c = 0; + int i, j; + + raw_spec = item->spec; + raw_mask = item->mask; + + spec_len = strlen((char *)(uintptr_t)raw_spec->pattern); + if (strlen((char *)(uintptr_t)raw_mask->pattern) != + spec_len) + return -rte_errno; + + pkt_len = spec_len / 2; + + pkt_buf = rte_zmalloc(NULL, pkt_len, 0); + if (!pkt_buf) + return -ENOMEM; + + msk_buf = rte_zmalloc(NULL, pkt_len, 0); + if (!msk_buf) + return -ENOMEM; + + /* convert string to int array */ + for (i = 0, j = 0; i < spec_len; i += 2, j++) { + tmp_c = raw_spec->pattern[i]; + if (tmp_c >= 'a' && tmp_c <= 'f') + tmp_val = tmp_c - 'a' + 10; + if (tmp_c >= 'A' && tmp_c <= 'F') + tmp_val = tmp_c - 'A' + 10; + if (tmp_c >= '0' && tmp_c <= '9') + tmp_val = tmp_c - '0'; + + tmp_c = raw_spec->pattern[i + 1]; + if (tmp_c >= 'a' && tmp_c <= 'f') + pkt_buf[j] = tmp_val * 16 + tmp_c - 'a' + 10; + if (tmp_c >= 'A' && tmp_c <= 'F') + pkt_buf[j] = tmp_val * 16 + tmp_c - 'A' + 10; + if (tmp_c >= '0' && tmp_c <= '9') + pkt_buf[j] = tmp_val * 16 + tmp_c - '0'; + + tmp_c = raw_mask->pattern[i]; + if (tmp_c >= 'a' && tmp_c <= 'f') + tmp_val = tmp_c - 0x57; + if (tmp_c >= 'A' && tmp_c <= 'F') + tmp_val = tmp_c - 0x37; + if (tmp_c >= '0' && tmp_c <= '9') + tmp_val = tmp_c - '0'; + + tmp_c = raw_mask->pattern[i + 1]; + if (tmp_c >= 'a' && tmp_c <= 'f') + msk_buf[j] = tmp_val * 16 + tmp_c - 'a' + 10; + if (tmp_c >= 'A' && tmp_c <= 'F') + msk_buf[j] = tmp_val * 16 + tmp_c - 'A' + 10; + if (tmp_c >= '0' && tmp_c <= '9') + msk_buf[j] = tmp_val * 16 + tmp_c - '0'; + } + + rte_memcpy(meta->proto_hdrs.raw.spec, pkt_buf, pkt_len); + rte_memcpy(meta->proto_hdrs.raw.mask, msk_buf, pkt_len); + meta->proto_hdrs.raw.pkt_len = pkt_len; + + rte_free(pkt_buf); + rte_free(msk_buf); + + return 0; +} + #define REFINE_PROTO_FLD(op, fld) \ VIRTCHNL_##op##_PROTO_HDR_FIELD(hdr, VIRTCHNL_PROTO_HDR_##fld) #define REPALCE_PROTO_FLD(fld_1, fld_2) \ @@ -1387,6 +1468,10 @@ iavf_hash_parse_action(struct iavf_pattern_match_item *match_item, RTE_FLOW_ERROR_TYPE_ACTION, action, "a non-NULL RSS queue is not supported"); + /* If pattern type is raw, no need to refine rss type */ + if (pattern_hint == IAVF_PHINT_RAW) + break; + /** * Check simultaneous use of SRC_ONLY and DST_ONLY * of the same level. @@ -1453,6 +1538,17 @@ iavf_hash_parse_pattern_action(__rte_unused struct iavf_adapter *ad, if (ret) goto error; + if (phint == IAVF_PHINT_RAW) { + rss_meta_ptr->raw_ena = true; + ret = iavf_hash_parse_raw_pattern(pattern, rss_meta_ptr); + if (ret) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, NULL, + "Parse raw pattern failed"); + goto error; + } + } + ret = iavf_hash_parse_action(pattern_match_item, actions, phint, rss_meta_ptr, error); -- 2.25.1