From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2CA1AA0093; Fri, 22 Apr 2022 12:49:34 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E51BA42838; Fri, 22 Apr 2022 12:48:27 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id D761A4067B for ; Fri, 22 Apr 2022 12:48:24 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 23M0F677003121 for ; Fri, 22 Apr 2022 03:48:24 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=cqHCMoiYx6idJy3XJtvq0mW8w9EX4BAlGa6+t0ZzAUo=; b=WYU8fzmLnaOmqZ+zlO53pzj8IRYVGEGGUYddE9AsEbHW4Bar2d7GQCjc1pOfPnKma3r+ z15AuH0gm2i4X23GYOOkb+WmRGwOSLgXj5A+vpE+s1f5Ohfxh++EOG1XV3UJdWhMVDS5 PSY7a4Es/cc8IuEZ50kbYkCeXRUaN0JhBHLdGkef/7QkVie7EX51Ef4IPK0FpqV4lPXL 03ejyn2DvBeRsabVlGOXUUtKgquVGwwOk8sRw1Rrx6cRVPGLNkvU4ZF6jk/mxEAvWCvv zu16BJ7IvXBcItLMaztz5ND32+pAjfA+qVmLHAsHGwllf/XYmDoaGy5u32nZIqFNHRRZ fw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3fk7mk44dx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 22 Apr 2022 03:48:23 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 22 Apr 2022 03:48:22 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 22 Apr 2022 03:48:22 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 5F3D63F707F; Fri, 22 Apr 2022 03:48:20 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH v2 24/28] net/cnxk: add support for flow control for outbound inline Date: Fri, 22 Apr 2022 16:17:05 +0530 Message-ID: <20220422104709.20722-24-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220422104709.20722-1-ndabilpuram@marvell.com> References: <20220422104709.20722-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: bZbXQZH7anICotUdVNpu8g9hqMaLD281 X-Proofpoint-GUID: bZbXQZH7anICotUdVNpu8g9hqMaLD281 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-04-22_02,2022-04-22_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support for flow control in outbound inline path using fc updates from CPT. Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cn10k_ethdev.c | 3 +++ drivers/net/cnxk/cn10k_ethdev.h | 1 + drivers/net/cnxk/cn10k_tx.h | 37 ++++++++++++++++++++++++++++++++++++- drivers/net/cnxk/cnxk_ethdev.c | 13 +++++++++++++ drivers/net/cnxk/cnxk_ethdev.h | 3 +++ 5 files changed, 56 insertions(+), 1 deletion(-) diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c index d04b9eb..de688f0 100644 --- a/drivers/net/cnxk/cn10k_ethdev.c +++ b/drivers/net/cnxk/cn10k_ethdev.c @@ -204,6 +204,9 @@ cn10k_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid, txq->cpt_io_addr = inl_lf->io_addr; txq->cpt_fc = inl_lf->fc_addr; + txq->cpt_fc_sw = (int32_t *)((uintptr_t)dev->outb.fc_sw_mem + + crypto_qid * RTE_CACHE_LINE_SIZE); + txq->cpt_desc = inl_lf->nb_desc * 0.7; txq->sa_base = (uint64_t)dev->outb.sa_base; txq->sa_base |= eth_dev->data->port_id; diff --git a/drivers/net/cnxk/cn10k_ethdev.h b/drivers/net/cnxk/cn10k_ethdev.h index c8666ce..acfdbb6 100644 --- a/drivers/net/cnxk/cn10k_ethdev.h +++ b/drivers/net/cnxk/cn10k_ethdev.h @@ -19,6 +19,7 @@ struct cn10k_eth_txq { uint64_t sa_base; uint64_t *cpt_fc; uint16_t cpt_desc; + int32_t *cpt_fc_sw; uint64_t lso_tun_fmt; uint64_t ts_mem; uint64_t mark_flag : 8; diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h index c482352..762586f 100644 --- a/drivers/net/cnxk/cn10k_tx.h +++ b/drivers/net/cnxk/cn10k_tx.h @@ -209,6 +209,37 @@ cn10k_nix_tx_skeleton(struct cn10k_eth_txq *txq, uint64_t *cmd, } static __rte_always_inline void +cn10k_nix_sec_fc_wait(struct cn10k_eth_txq *txq, uint16_t nb_pkts) +{ + int32_t nb_desc, val, newval; + int32_t *fc_sw; + volatile uint64_t *fc; + + /* Check if there is any CPT instruction to submit */ + if (!nb_pkts) + return; + +again: + fc_sw = txq->cpt_fc_sw; + val = __atomic_sub_fetch(fc_sw, nb_pkts, __ATOMIC_RELAXED); + if (likely(val >= 0)) + return; + + nb_desc = txq->cpt_desc; + fc = txq->cpt_fc; + while (true) { + newval = nb_desc - __atomic_load_n(fc, __ATOMIC_RELAXED); + newval -= nb_pkts; + if (newval >= 0) + break; + } + + if (!__atomic_compare_exchange_n(fc_sw, &val, newval, false, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) + goto again; +} + +static __rte_always_inline void cn10k_nix_sec_steorl(uintptr_t io_addr, uint32_t lmt_id, uint8_t lnum, uint8_t loff, uint8_t shft) { @@ -995,6 +1026,7 @@ cn10k_nix_xmit_pkts(void *tx_queue, uint64_t *ws, struct rte_mbuf **tx_pkts, if (flags & NIX_TX_OFFLOAD_SECURITY_F) { /* Reduce pkts to be sent to CPT */ burst -= ((c_lnum << 1) + c_loff); + cn10k_nix_sec_fc_wait(txq, (c_lnum << 1) + c_loff); cn10k_nix_sec_steorl(c_io_addr, c_lmt_id, c_lnum, c_loff, c_shft); } @@ -1138,6 +1170,7 @@ cn10k_nix_xmit_pkts_mseg(void *tx_queue, uint64_t *ws, if (flags & NIX_TX_OFFLOAD_SECURITY_F) { /* Reduce pkts to be sent to CPT */ burst -= ((c_lnum << 1) + c_loff); + cn10k_nix_sec_fc_wait(txq, (c_lnum << 1) + c_loff); cn10k_nix_sec_steorl(c_io_addr, c_lmt_id, c_lnum, c_loff, c_shft); } @@ -2682,9 +2715,11 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, left -= burst; /* Submit CPT instructions if any */ - if (flags & NIX_TX_OFFLOAD_SECURITY_F) + if (flags & NIX_TX_OFFLOAD_SECURITY_F) { + cn10k_nix_sec_fc_wait(txq, (c_lnum << 1) + c_loff); cn10k_nix_sec_steorl(c_io_addr, c_lmt_id, c_lnum, c_loff, c_shft); + } /* Trigger LMTST */ if (lnum > 16) { diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index e1b1e16..12ff30f 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -155,9 +155,19 @@ nix_security_setup(struct cnxk_eth_dev *dev) dev->outb.sa_base = roc_nix_inl_outb_sa_base_get(nix); dev->outb.sa_bmap_mem = mem; dev->outb.sa_bmap = bmap; + + dev->outb.fc_sw_mem = plt_zmalloc(dev->outb.nb_crypto_qs * + RTE_CACHE_LINE_SIZE, + RTE_CACHE_LINE_SIZE); + if (!dev->outb.fc_sw_mem) { + plt_err("Outbound fc sw mem alloc failed"); + goto sa_bmap_free; + } } return 0; +sa_bmap_free: + plt_free(dev->outb.sa_bmap_mem); sa_dptr_free: if (dev->inb.sa_dptr) plt_free(dev->inb.sa_dptr); @@ -253,6 +263,9 @@ nix_security_release(struct cnxk_eth_dev *dev) plt_free(dev->outb.sa_dptr); dev->outb.sa_dptr = NULL; } + + plt_free(dev->outb.fc_sw_mem); + dev->outb.fc_sw_mem = NULL; } dev->inb.inl_dev = false; diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index 7c7e013..28fc937 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -321,6 +321,9 @@ struct cnxk_eth_dev_sec_outb { /* Crypto queues => CPT lf count */ uint16_t nb_crypto_qs; + /* FC sw mem */ + uint64_t *fc_sw_mem; + /* Active sessions */ uint16_t nb_sess; -- 2.8.4