From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4FBA1A0093; Fri, 22 Apr 2022 12:49:52 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2CEE64283A; Fri, 22 Apr 2022 12:48:34 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id AB9D142815 for ; Fri, 22 Apr 2022 12:48:32 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 23M0PRVF003207 for ; Fri, 22 Apr 2022 03:48:31 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=yubzyS3efg8b5Zwh3rSvHs68sbCz1vU+YJROQKCuTCQ=; b=LfhoeiHr6KGvPCRK6ovAncn3+nv8uQ1i+pBb0uQims709G/WIGW5r6C8QxBHhoyFNviq whYRQ0phNy86m+pJuKr5td4tqwQ0JNDvDplOphNo/WkMivfmVmZSqONdPV/NogYRg3tR SBWhoUdKMYj0rEtYK66UK+MbXNDy7BxO6pkLeDXDUqksP4qYq9/I5worXeMbtxWilI1z X+OUHvRaqsMbgZKkCN5icWBdhjI2LXP3ceaQsevLKl7eNUkClwyYMrDMWI62EmQ8wzLI wvYE7KiPIJ9czMXSYIEvPIUqrhv/7FdCoTNipLLfqwZi+URD+jOm5xef+ii12CfhmroU 3A== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3fk7mk44es-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 22 Apr 2022 03:48:31 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 22 Apr 2022 03:48:30 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 22 Apr 2022 03:48:30 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 4AA223F7080; Fri, 22 Apr 2022 03:48:28 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH v2 27/28] net/cnxk: setup variable inline inbound SA Date: Fri, 22 Apr 2022 16:17:08 +0530 Message-ID: <20220422104709.20722-27-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220422104709.20722-1-ndabilpuram@marvell.com> References: <20220422104709.20722-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: t3Pc74R_jtq8ayBbn8C0DyMfo9qr4bQq X-Proofpoint-GUID: t3Pc74R_jtq8ayBbn8C0DyMfo9qr4bQq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-04-22_02,2022-04-22_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Setup inline inbound SA assuming variable size defined at compile time. Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cn10k_ethdev_sec.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c index 7c4988b..65519ee 100644 --- a/drivers/net/cnxk/cn10k_ethdev_sec.c +++ b/drivers/net/cnxk/cn10k_ethdev_sec.c @@ -259,7 +259,7 @@ static const struct rte_security_capability cn10k_eth_sec_capabilities[] = { .proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP, .mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL, .direction = RTE_SECURITY_IPSEC_SA_DIR_INGRESS, - .replay_win_sz_max = ROC_AR_WIN_SIZE_MAX, + .replay_win_sz_max = ROC_NIX_INL_OT_IPSEC_AR_WIN_SZ_MAX, .options = { .udp_encap = 1, .udp_ports_verify = 1, @@ -284,7 +284,7 @@ static const struct rte_security_capability cn10k_eth_sec_capabilities[] = { .proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP, .mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL, .direction = RTE_SECURITY_IPSEC_SA_DIR_EGRESS, - .replay_win_sz_max = ROC_AR_WIN_SIZE_MAX, + .replay_win_sz_max = ROC_NIX_INL_OT_IPSEC_AR_WIN_SZ_MAX, .options = { .iv_gen_disable = 1, .udp_encap = 1, @@ -309,7 +309,7 @@ static const struct rte_security_capability cn10k_eth_sec_capabilities[] = { .proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP, .mode = RTE_SECURITY_IPSEC_SA_MODE_TRANSPORT, .direction = RTE_SECURITY_IPSEC_SA_DIR_EGRESS, - .replay_win_sz_max = ROC_AR_WIN_SIZE_MAX, + .replay_win_sz_max = ROC_NIX_INL_OT_IPSEC_AR_WIN_SZ_MAX, .options = { .iv_gen_disable = 1, .udp_encap = 1, @@ -333,7 +333,7 @@ static const struct rte_security_capability cn10k_eth_sec_capabilities[] = { .proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP, .mode = RTE_SECURITY_IPSEC_SA_MODE_TRANSPORT, .direction = RTE_SECURITY_IPSEC_SA_DIR_INGRESS, - .replay_win_sz_max = ROC_AR_WIN_SIZE_MAX, + .replay_win_sz_max = ROC_NIX_INL_OT_IPSEC_AR_WIN_SZ_MAX, .options = { .udp_encap = 1, .udp_ports_verify = 1, @@ -658,7 +658,7 @@ cn10k_eth_sec_session_create(void *device, } inb_sa_dptr = (struct roc_ot_ipsec_inb_sa *)dev->inb.sa_dptr; - memset(inb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_inb_sa)); + memset(inb_sa_dptr, 0, ROC_NIX_INL_OT_IPSEC_INB_HW_SZ); /* Fill inbound sa params */ rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto, @@ -701,7 +701,7 @@ cn10k_eth_sec_session_create(void *device, /* Sync session in context cache */ rc = roc_nix_inl_ctx_write(&dev->nix, inb_sa_dptr, eth_sec->sa, eth_sec->inb, - sizeof(struct roc_ot_ipsec_inb_sa)); + ROC_NIX_INL_OT_IPSEC_INB_HW_SZ); if (rc) goto mempool_put; @@ -731,7 +731,7 @@ cn10k_eth_sec_session_create(void *device, rlens = &outb_priv->rlens; outb_sa_dptr = (struct roc_ot_ipsec_outb_sa *)dev->outb.sa_dptr; - memset(outb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_outb_sa)); + memset(outb_sa_dptr, 0, ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ); /* Fill outbound sa params */ rc = cnxk_ot_ipsec_outb_sa_fill(outb_sa_dptr, ipsec, crypto); @@ -795,7 +795,7 @@ cn10k_eth_sec_session_create(void *device, /* Sync session in context cache */ rc = roc_nix_inl_ctx_write(&dev->nix, outb_sa_dptr, eth_sec->sa, eth_sec->inb, - sizeof(struct roc_ot_ipsec_outb_sa)); + ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ); if (rc) goto mempool_put; } @@ -846,21 +846,23 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess) if (eth_sec->inb) { /* Disable SA */ sa_dptr = dev->inb.sa_dptr; + memset(sa_dptr, 0, ROC_NIX_INL_OT_IPSEC_INB_HW_SZ); roc_ot_ipsec_inb_sa_init(sa_dptr, true); roc_nix_inl_ctx_write(&dev->nix, sa_dptr, eth_sec->sa, eth_sec->inb, - sizeof(struct roc_ot_ipsec_inb_sa)); + ROC_NIX_INL_OT_IPSEC_INB_HW_SZ); TAILQ_REMOVE(&dev->inb.list, eth_sec, entry); dev->inb.nb_sess--; } else { /* Disable SA */ sa_dptr = dev->outb.sa_dptr; + memset(sa_dptr, 0, ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ); roc_ot_ipsec_outb_sa_init(sa_dptr); roc_nix_inl_ctx_write(&dev->nix, sa_dptr, eth_sec->sa, eth_sec->inb, - sizeof(struct roc_ot_ipsec_outb_sa)); + ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ); /* Release Outbound SA index */ cnxk_eth_outb_sa_idx_put(dev, eth_sec->sa_idx); TAILQ_REMOVE(&dev->outb.list, eth_sec, entry); -- 2.8.4