From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6C020A034C; Thu, 28 Apr 2022 10:21:33 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6DD4142801; Thu, 28 Apr 2022 10:21:24 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id BA0D7410E1 for ; Thu, 28 Apr 2022 10:21:21 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651134081; x=1682670081; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=SR8Tvsu5q85Hcsh7EseB3aO7tbkt7O3lipFx5VOHwnw=; b=Cg/EsuQWvsNZOGbUlzXztyatSgKMOPh3QMn/SiU1RVckojYAQ1c6R8CQ wXfPwe/bkg2ZIdepdABSwuE4m4vyJlHLt+6dxEOEfh/3axsK4wWggKel9 VD6uJCuU8jVUJP2mWEWiz19EaD5xt102kgNWLBfwb+y4JknG8bTv1ck49 rzOPrv9HVd70LJfnl2J0FWK0eWIPN+xrCHyWVsIFBqBH+jE8Bp7C6/2N3 NItD8xjGPwpdv5+2WbgOSFiSXRQe+tAwJKeGdbCHQ8bmaGxEseKj24O04 wisb52dxWfuTmCZEJxpNY5Kfo3Zjt8mP8FgSw+rr4IZx8mJfLDyW64gus Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10330"; a="266018344" X-IronPort-AV: E=Sophos;i="5.90,295,1643702400"; d="scan'208";a="266018344" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Apr 2022 01:21:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,295,1643702400"; d="scan'208";a="581151903" Received: from unknown (HELO npg-dpdk-simeisu-cvl-119d218.sh.intel.com) ([10.67.119.218]) by orsmga008.jf.intel.com with ESMTP; 28 Apr 2022 01:21:19 -0700 From: Simei Su To: qi.z.zhang@intel.com, qiming.yang@intel.com Cc: dev@dpdk.org, wenjun1.wu@intel.com, Simei Su Subject: [PATCH v3 3/3] net/iavf: improve performance of Rx timestamp offload Date: Thu, 28 Apr 2022 16:13:46 +0800 Message-Id: <20220428081346.94049-4-simei.su@intel.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20220428081346.94049-1-simei.su@intel.com> References: <20220424070845.87096-1-simei.su@intel.com> <20220428081346.94049-1-simei.su@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In this patch, We use CPU ticks instead of HW register to determine whether low 32 bits timestamp has turned over. It can avoid requesting register value frequently and improve receiving performance. Signed-off-by: Wenjun Wu --- drivers/net/iavf/iavf.h | 1 + drivers/net/iavf/iavf_ethdev.c | 9 ++++++++ drivers/net/iavf/iavf_rxtx.c | 51 +++++++++++++++++++++++++++--------------- drivers/net/iavf/iavf_rxtx.h | 1 - 4 files changed, 43 insertions(+), 19 deletions(-) diff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h index 3255c93..dd83567 100644 --- a/drivers/net/iavf/iavf.h +++ b/drivers/net/iavf/iavf.h @@ -315,6 +315,7 @@ struct iavf_adapter { uint16_t fdir_ref_cnt; struct iavf_devargs devargs; uint64_t phc_time; + uint64_t hw_time_update; }; /* IAVF_DEV_PRIVATE_TO */ diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c index 89e4240..d1a2b53 100644 --- a/drivers/net/iavf/iavf_ethdev.c +++ b/drivers/net/iavf/iavf_ethdev.c @@ -1019,6 +1019,15 @@ iavf_dev_start(struct rte_eth_dev *dev) goto err_mac; } + if (dev->data->dev_conf.rxmode.offloads & + RTE_ETH_RX_OFFLOAD_TIMESTAMP) { + if (iavf_get_phc_time(adapter)) { + PMD_DRV_LOG(ERR, "get physical time failed"); + goto err_mac; + } + adapter->hw_time_update = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000); + } + return 0; err_mac: diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c index 4c731e7..345f6ae 100644 --- a/drivers/net/iavf/iavf_rxtx.c +++ b/drivers/net/iavf/iavf_rxtx.c @@ -1433,8 +1433,14 @@ iavf_recv_pkts_flex_rxd(void *rx_queue, struct iavf_adapter *ad = rxq->vsi->adapter; uint64_t ts_ns; - if (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) - rxq->hw_register_set = 1; + if (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) { + uint64_t sw_cur_time = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000); + if (sw_cur_time - ad->hw_time_update > 4) { + if (iavf_get_phc_time(ad)) + PMD_DRV_LOG(ERR, "get physical time failed"); + ad->hw_time_update = sw_cur_time; + } + } while (nb_rx < nb_pkts) { rxdp = (volatile union iavf_rx_flex_desc *)&rx_ring[rx_id]; @@ -1499,13 +1505,12 @@ iavf_recv_pkts_flex_rxd(void *rx_queue, pkt_flags = iavf_flex_rxd_error_to_pkt_flags(rx_stat_err0); if (iavf_timestamp_dynflag > 0) { - if (rxq->hw_register_set) - iavf_get_phc_time(ad); - - rxq->hw_register_set = 0; ts_ns = iavf_tstamp_convert_32b_64b(ad->phc_time, rte_le_to_cpu_32(rxd.wb.flex_ts.ts_high)); + ad->phc_time = ts_ns; + ad->hw_time_update = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000); + *RTE_MBUF_DYNFIELD(rxm, iavf_timestamp_dynfield_offset, rte_mbuf_timestamp_t *) = ts_ns; @@ -1547,8 +1552,14 @@ iavf_recv_scattered_pkts_flex_rxd(void *rx_queue, struct rte_mbuf **rx_pkts, volatile union iavf_rx_flex_desc *rxdp; const uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl; - if (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) - rxq->hw_register_set = 1; + if (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) { + uint64_t sw_cur_time = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000); + if (sw_cur_time - ad->hw_time_update > 4) { + if (iavf_get_phc_time(ad)) + PMD_DRV_LOG(ERR, "get physical time failed"); + ad->hw_time_update = sw_cur_time; + } + } while (nb_rx < nb_pkts) { rxdp = (volatile union iavf_rx_flex_desc *)&rx_ring[rx_id]; @@ -1663,13 +1674,12 @@ iavf_recv_scattered_pkts_flex_rxd(void *rx_queue, struct rte_mbuf **rx_pkts, pkt_flags = iavf_flex_rxd_error_to_pkt_flags(rx_stat_err0); if (iavf_timestamp_dynflag > 0) { - if (rxq->hw_register_set) - iavf_get_phc_time(ad); - - rxq->hw_register_set = 0; ts_ns = iavf_tstamp_convert_32b_64b(ad->phc_time, rte_le_to_cpu_32(rxd.wb.flex_ts.ts_high)); + ad->phc_time = ts_ns; + ad->hw_time_update = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000); + *RTE_MBUF_DYNFIELD(first_seg, iavf_timestamp_dynfield_offset, rte_mbuf_timestamp_t *) = ts_ns; @@ -1883,8 +1893,14 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq, if (!(stat_err0 & (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S))) return 0; - if (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) - rxq->hw_register_set = 1; + if (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) { + uint64_t sw_cur_time = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000); + if (sw_cur_time - ad->hw_time_update > 4) { + if (iavf_get_phc_time(ad)) + PMD_DRV_LOG(ERR, "get physical time failed"); + ad->hw_time_update = sw_cur_time; + } + } /* Scan LOOK_AHEAD descriptors at a time to determine which * descriptors reference packets that are ready to be received. @@ -1943,13 +1959,12 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq, pkt_flags = iavf_flex_rxd_error_to_pkt_flags(stat_err0); if (iavf_timestamp_dynflag > 0) { - if (rxq->hw_register_set) - iavf_get_phc_time(ad); - - rxq->hw_register_set = 0; ts_ns = iavf_tstamp_convert_32b_64b(ad->phc_time, rte_le_to_cpu_32(rxdp[j].wb.flex_ts.ts_high)); + ad->phc_time = ts_ns; + ad->hw_time_update = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000); + *RTE_MBUF_DYNFIELD(mb, iavf_timestamp_dynfield_offset, rte_mbuf_timestamp_t *) = ts_ns; diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h index 37453c4..642b9a7 100644 --- a/drivers/net/iavf/iavf_rxtx.h +++ b/drivers/net/iavf/iavf_rxtx.h @@ -222,7 +222,6 @@ struct iavf_rx_queue { /* flexible descriptor metadata extraction offload flag */ struct iavf_rx_queue_stats stats; uint64_t offloads; - uint32_t hw_register_set; }; struct iavf_tx_entry { -- 2.9.5