From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 129A0A04FF; Thu, 5 May 2022 14:57:43 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2B36E42861; Thu, 5 May 2022 14:56:52 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 9CED84285F for ; Thu, 5 May 2022 14:56:50 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.16.1.2) with ESMTP id 2458BaRE012050 for ; Thu, 5 May 2022 05:56:49 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=LibNrpwSppn4wsiq4/4rYw3I9GOiRHjz8nwQmFf6pQM=; b=XViac95I8C8jFBAcaPf0L2LUPaNC6eMmnQjWyrEKiizmvPtwj+nkBPuGzkmjLY9ObpVZ ssxN8uhlPp4PllYp9Lb3cYutEl5b0XWS9p0yRv4U+fUGzwnKmHwNWnvNr8rpNADwHHyS 2zdohzfBnz7nPo8DyuqBVl6YX+48in5DsYe7UDl8v46WzdawXy+jWvAwy+b1HRkkIDwN HEp/tSFVQGoBXlMuSnhf4tFofDG5rVpkOBBCOaq/rTv2It2w1XBZWXP95SuWe8eApOZu 7P8917RN4kQeWa/tBT36oqc+KvNB7FdwYlWGiDqRclacMgW1tWDYj/iVIQ0R7UsknSlP hw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3fuscx4y96-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 05 May 2022 05:56:49 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 5 May 2022 05:56:48 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 5 May 2022 05:56:48 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id EE9483F70A3; Thu, 5 May 2022 05:56:45 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Akhil Goyal Subject: [PATCH v3 17/28] net/cnxk: reset offload flag if reassembly is disabled Date: Thu, 5 May 2022 18:25:46 +0530 Message-ID: <20220505125557.8828-17-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220505125557.8828-1-ndabilpuram@marvell.com> References: <20220419055921.10566-1-ndabilpuram@marvell.com> <20220505125557.8828-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: 2XeDbdnLFAJS8tkrsn7gwx_esiVqZsij X-Proofpoint-ORIG-GUID: 2XeDbdnLFAJS8tkrsn7gwx_esiVqZsij X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-05_05,2022-05-05_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Akhil Goyal The rx offload flag need to be reset if IP reassembly flag is not set while calling reassembly_conf_set. Signed-off-by: Akhil Goyal --- drivers/net/cnxk/cn10k_ethdev.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c index b5f3c83..d04b9eb 100644 --- a/drivers/net/cnxk/cn10k_ethdev.c +++ b/drivers/net/cnxk/cn10k_ethdev.c @@ -547,6 +547,12 @@ cn10k_nix_reassembly_conf_set(struct rte_eth_dev *eth_dev, struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); int rc = 0; + if (!conf->flags) { + /* Clear offload flags on disable */ + dev->rx_offload_flags &= ~NIX_RX_REAS_F; + return 0; + } + rc = roc_nix_reassembly_configure(conf->timeout_ms, conf->max_frags); if (!rc && dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) -- 2.8.4