From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 61381A0503; Sun, 8 May 2022 08:27:01 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2289542838; Sun, 8 May 2022 08:26:43 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id C59D442837 for ; Sun, 8 May 2022 08:26:41 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2483ToDb011057 for ; Sat, 7 May 2022 23:26:41 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=8GSWpZuz79WMLgQroyf0oYBriL6jEL/U9H5C+hISODA=; b=OYR5+O4XZ/Kva/pAEJmqbvmWiR6SKlokNEKk2J46NgG7Wej8ciKWAslTE8J5q4n/DqI5 hAyVEgNON2cBW0p1iDIn82AuxtnCQXfkNHSZzCQ0W3g2DxiVkOSRivJBbjmaTFqPlVCR l1+D3ij2B3Bysb+7jTgzRl3BN4L5Du38FwMVeW6XET+Rmk6gJSSORWB/fmelXtzNFdBI bDi8XAcMXG8oeASmm9kvQYJ8UD6TimmnoZTBj2R9gd9CL5GVtORRxKZFMfndr79JqhXK pZsl3DCPWX3xu6l+Nhp+yHPU8jigdloe/l/NbPJqSUpIxAxOhhVBxRhWahWl2F6ACgcR zA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3fwp4psyn7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 07 May 2022 23:26:40 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 7 May 2022 23:26:39 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 7 May 2022 23:26:39 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 45C2C5B6929; Sat, 7 May 2022 23:26:37 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: Subject: [PATCH v4 07/28] common/cnxk: fix issues in soft expiry disable path Date: Sun, 8 May 2022 11:55:55 +0530 Message-ID: <20220508062616.3398-7-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220508062616.3398-1-ndabilpuram@marvell.com> References: <20220419055921.10566-1-ndabilpuram@marvell.com> <20220508062616.3398-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: mrBA6VzFXFqviYgiscBpqxqrwcaJbX-j X-Proofpoint-GUID: mrBA6VzFXFqviYgiscBpqxqrwcaJbX-j X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-08_02,2022-05-06_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Fix issues in mode where soft expiry is disabled in RoC. When soft expiry support is not enabled in inline device, memory is not allocated for the ring base array and should not be accessed. Fixes: bea5d990a93b ("net/cnxk: support outbound soft expiry notification") Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/roc_nix_inl.c | 9 +++++---- drivers/common/cnxk/roc_nix_inl_dev.c | 5 +++-- drivers/common/cnxk/roc_nix_inl_priv.h | 1 + 3 files changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c index d68615a..4573529 100644 --- a/drivers/common/cnxk/roc_nix_inl.c +++ b/drivers/common/cnxk/roc_nix_inl.c @@ -210,7 +210,7 @@ roc_nix_inl_inb_sa_sz(struct roc_nix *roc_nix, bool inl_dev_sa) uintptr_t roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool inb_inl_dev, uint32_t spi) { - uint32_t max_spi, min_spi, mask; + uint32_t max_spi = 0, min_spi = 0, mask; uintptr_t sa_base; uint64_t sz; @@ -463,7 +463,7 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix) nix->outb_se_ring_base = roc_nix->port_id * ROC_NIX_SOFT_EXP_PER_PORT_MAX_RINGS; - if (inl_dev == NULL) { + if (inl_dev == NULL || !inl_dev->set_soft_exp_poll) { nix->outb_se_ring_cnt = 0; return 0; } @@ -539,11 +539,12 @@ roc_nix_inl_outb_fini(struct roc_nix *roc_nix) plt_free(nix->outb_sa_base); nix->outb_sa_base = NULL; - if (idev && idev->nix_inl_dev) { + if (idev && idev->nix_inl_dev && nix->outb_se_ring_cnt) { inl_dev = idev->nix_inl_dev; ring_base = inl_dev->sa_soft_exp_ring; + ring_base += nix->outb_se_ring_base; - for (i = 0; i < ROC_NIX_INL_MAX_SOFT_EXP_RNGS; i++) { + for (i = 0; i < nix->outb_se_ring_cnt; i++) { if (ring_base[i]) plt_free(PLT_PTR_CAST(ring_base[i])); } diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c index 51f1f68..5e61a42 100644 --- a/drivers/common/cnxk/roc_nix_inl_dev.c +++ b/drivers/common/cnxk/roc_nix_inl_dev.c @@ -814,6 +814,7 @@ roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev) inl_dev->wqe_skip = roc_inl_dev->wqe_skip; inl_dev->spb_drop_pc = NIX_AURA_DROP_PC_DFLT; inl_dev->lpb_drop_pc = NIX_AURA_DROP_PC_DFLT; + inl_dev->set_soft_exp_poll = roc_inl_dev->set_soft_exp_poll; if (roc_inl_dev->spb_drop_pc) inl_dev->spb_drop_pc = roc_inl_dev->spb_drop_pc; @@ -849,7 +850,7 @@ roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev) if (rc) goto sso_release; - if (roc_inl_dev->set_soft_exp_poll) { + if (inl_dev->set_soft_exp_poll) { rc = nix_inl_outb_poll_thread_setup(inl_dev); if (rc) goto cpt_release; @@ -898,7 +899,7 @@ roc_nix_inl_dev_fini(struct roc_nix_inl_dev *roc_inl_dev) inl_dev = idev->nix_inl_dev; pci_dev = inl_dev->pci_dev; - if (roc_inl_dev->set_soft_exp_poll) { + if (inl_dev->set_soft_exp_poll) { soft_exp_poll_thread_exit = true; pthread_join(inl_dev->soft_exp_poll_thread, NULL); plt_bitmap_free(inl_dev->soft_exp_ring_bmap); diff --git a/drivers/common/cnxk/roc_nix_inl_priv.h b/drivers/common/cnxk/roc_nix_inl_priv.h index f9646a3..1ab8470 100644 --- a/drivers/common/cnxk/roc_nix_inl_priv.h +++ b/drivers/common/cnxk/roc_nix_inl_priv.h @@ -59,6 +59,7 @@ struct nix_inl_dev { pthread_t soft_exp_poll_thread; uint32_t soft_exp_poll_freq; uint64_t *sa_soft_exp_ring; + bool set_soft_exp_poll; /* Soft expiry ring bitmap */ struct plt_bitmap *soft_exp_ring_bmap; -- 2.8.4