From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C7BECA00C3; Fri, 13 May 2022 20:27:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2218142834; Fri, 13 May 2022 20:27:38 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 9D40642834 for ; Fri, 13 May 2022 20:27:36 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 24D6COJL007624; Fri, 13 May 2022 11:27:32 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=C+ue5pg4Wfhwjbsjo9U+sZRF35PGvYHSZvkOsM0Qb0c=; b=W/N/cUdcPVqsD8x86rVnVmeazs7CvyoHznQ6rrCwmZ40/UZM7bxiUQDIKm5VRFbkvZy6 uotQJdIJwe2OwhPiDFyxetz6wLGxqx54+hIuy5ZSPV6nrfA6ECkTpptDBSA/ggKTjU17 C8GnHbLc+lINCEbpUIa9ip+sDV3MbbuTj6jvvbEJyqKr1efy51AoixW4Ic1Tr+HuB/a/ n1phxXlYwhTA1159ZC3//78hP4qeyZeFI28V2eF4eyVnc3xGlknBvhQMOgM7OjNW0AEc D/SFFjOP0RygnrvXsA1RqdvQNi9Q8BEvWIYE0bIMxjO8XeiyLdMYfOZcAaTOvNN2S7NK vg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3g0yqwq6sc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 13 May 2022 11:27:32 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 13 May 2022 11:27:30 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 13 May 2022 11:27:30 -0700 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.193.70.72]) by maili.marvell.com (Postfix) with ESMTP id 322B43F706F; Fri, 13 May 2022 11:27:26 -0700 (PDT) From: To: , , , Sameh Gobriel , "Bruce Richardson" , Vladimir Medvedkin , Ruifeng Wang CC: , Pavan Nikhilesh Subject: [PATCH v9 2/2] hash: unify crc32 selection for x86 and Arm Date: Fri, 13 May 2022 23:57:10 +0530 Message-ID: <20220513182710.13060-2-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220513182710.13060-1-pbhagavatula@marvell.com> References: <20220429161700.2145-1-pbhagavatula@marvell.com> <20220513182710.13060-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: z1FW-Ls3n6pAvTYhjWfAgDaNTO23U7ox X-Proofpoint-GUID: z1FW-Ls3n6pAvTYhjWfAgDaNTO23U7ox X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-13_10,2022-05-13_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Merge crc32 hash calculation public API implementation for x86 and Arm. Select the best available CRC32 algorithm when unsupported algorithm on a given CPU architecture is requested by an application. Previously, if an application directly includes `rte_crc_arm64.h` without including `rte_hash_crc.h` it will fail to compile. Signed-off-by: Pavan Nikhilesh Reviewed-by: Ruifeng Wang --- lib/hash/meson.build | 1 + lib/hash/rte_crc_arm64.h | 69 +++--------------- lib/hash/rte_crc_generic.h | 72 ++++++++++++++++++ lib/hash/rte_crc_x86.h | 89 +++++++++++++++++++++++ lib/hash/rte_hash_crc.h | 145 ++++++++++--------------------------- 5 files changed, 210 insertions(+), 166 deletions(-) create mode 100644 lib/hash/rte_crc_generic.h diff --git a/lib/hash/meson.build b/lib/hash/meson.build index ff13e2c7f9..b36c8b0c01 100644 --- a/lib/hash/meson.build +++ b/lib/hash/meson.build @@ -13,6 +13,7 @@ indirect_headers += files( 'rte_crc_sw.h', 'rte_crc_x86.h', 'rte_crc_arm64.h', + 'rte_crc_generic.h', 'rte_thash_x86_gfni.h', ) diff --git a/lib/hash/rte_crc_arm64.h b/lib/hash/rte_crc_arm64.h index b4628cfc09..172894335f 100644 --- a/lib/hash/rte_crc_arm64.h +++ b/lib/hash/rte_crc_arm64.h @@ -2,23 +2,8 @@ * Copyright(c) 2015 Cavium, Inc */ -#ifndef _RTE_CRC_ARM64_H_ -#define _RTE_CRC_ARM64_H_ - -/** - * @file - * - * RTE CRC arm64 Hash - */ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include -#include -#include +#ifndef _HASH_CRC_ARM64_H_ +#define _HASH_CRC_ARM64_H_ static inline uint32_t crc32c_arm64_u8(uint8_t data, uint32_t init_val) @@ -61,40 +46,8 @@ crc32c_arm64_u64(uint64_t data, uint32_t init_val) } /** - * Allow or disallow use of arm64 SIMD instrinsics for CRC32 hash - * calculation. - * - * @param alg - * An OR of following flags: - * - (CRC32_SW) Don't use arm64 crc intrinsics - * - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available - * - */ -static inline void -rte_hash_crc_set_alg(uint8_t alg) -{ - switch (alg) { - case CRC32_ARM64: - if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32)) - alg = CRC32_SW; - /* fall-through */ - case CRC32_SW: - crc32_alg = alg; - /* fall-through */ - default: - break; - } -} - -/* Setting the best available algorithm */ -RTE_INIT(rte_hash_crc_init_alg) -{ - rte_hash_crc_set_alg(CRC32_ARM64); -} - -/** - * Use single crc32 instruction to perform a hash on a 1 byte value. - * Fall back to software crc32 implementation in case arm64 crc intrinsics is + * Use single crc32 instruction to perform a hash on a byte value. + * Fall back to software crc32 implementation in case ARM CRC is * not supported * * @param data @@ -115,7 +68,7 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val) /** * Use single crc32 instruction to perform a hash on a 2 bytes value. - * Fall back to software crc32 implementation in case arm64 crc intrinsics is + * Fall back to software crc32 implementation in case ARM CRC is * not supported * * @param data @@ -136,7 +89,7 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val) /** * Use single crc32 instruction to perform a hash on a 4 byte value. - * Fall back to software crc32 implementation in case arm64 crc intrinsics is + * Fall back to software crc32 implementation in case ARM CRC is * not supported * * @param data @@ -157,7 +110,7 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val) /** * Use single crc32 instruction to perform a hash on a 8 byte value. - * Fall back to software crc32 implementation in case arm64 crc intrinsics is + * Fall back to software crc32 implementation in case ARM CRC is * not supported * * @param data @@ -170,14 +123,10 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val) static inline uint32_t rte_hash_crc_8byte(uint64_t data, uint32_t init_val) { - if (likely(crc32_alg == CRC32_ARM64)) + if (likely(crc32_alg & CRC32_ARM64)) return crc32c_arm64_u64(data, init_val); return crc32c_2words(data, init_val); } -#ifdef __cplusplus -} -#endif - -#endif /* _RTE_CRC_ARM64_H_ */ +#endif /* _HASH_CRC_ARM64_H_ */ diff --git a/lib/hash/rte_crc_generic.h b/lib/hash/rte_crc_generic.h new file mode 100644 index 0000000000..0c55947896 --- /dev/null +++ b/lib/hash/rte_crc_generic.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2022 Marvell. + */ + +#ifndef _HASH_CRC_GENERIC_H_ +#define _HASH_CRC_GENERIC_H_ + +/** + * Software crc32 implementation for 1 byte value. + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_1byte(uint8_t data, uint32_t init_val) +{ + return crc32c_1byte(data, init_val); +} + +/** + * Software crc32 implementation for 2 byte value. + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_2byte(uint16_t data, uint32_t init_val) +{ + return crc32c_2bytes(data, init_val); +} + +/** + * Software crc32 implementation for 4 byte value. + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_4byte(uint32_t data, uint32_t init_val) +{ + return crc32c_1word(data, init_val); +} + +/** + * Software crc32 implementation for 8 byte value. + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_8byte(uint64_t data, uint32_t init_val) +{ + return crc32c_2words(data, init_val); +} + +#endif diff --git a/lib/hash/rte_crc_x86.h b/lib/hash/rte_crc_x86.h index b80a742afa..19eb3584e7 100644 --- a/lib/hash/rte_crc_x86.h +++ b/lib/hash/rte_crc_x86.h @@ -59,4 +59,93 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val) return (uint32_t)init_val; } +/** + * Use single crc32 instruction to perform a hash on a byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_1byte(uint8_t data, uint32_t init_val) +{ + if (likely(crc32_alg & CRC32_SSE42)) + return crc32c_sse42_u8(data, init_val); + + return crc32c_1byte(data, init_val); +} + +/** + * Use single crc32 instruction to perform a hash on a 2 bytes value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_2byte(uint16_t data, uint32_t init_val) +{ + if (likely(crc32_alg & CRC32_SSE42)) + return crc32c_sse42_u16(data, init_val); + + return crc32c_2bytes(data, init_val); +} + +/** + * Use single crc32 instruction to perform a hash on a 4 byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_4byte(uint32_t data, uint32_t init_val) +{ + if (likely(crc32_alg & CRC32_SSE42)) + return crc32c_sse42_u32(data, init_val); + + return crc32c_1word(data, init_val); +} + +/** + * Use single crc32 instruction to perform a hash on a 8 byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_8byte(uint64_t data, uint32_t init_val) +{ +#ifdef RTE_ARCH_X86_64 + if (likely(crc32_alg == CRC32_SSE42_x64)) + return crc32c_sse42_u64(data, init_val); +#endif + + if (likely(crc32_alg & CRC32_SSE42)) + return crc32c_sse42_u64_mimic(data, init_val); + + return crc32c_2words(data, init_val); +} + #endif diff --git a/lib/hash/rte_hash_crc.h b/lib/hash/rte_hash_crc.h index 308fdde414..e7b3fec4d0 100644 --- a/lib/hash/rte_hash_crc.h +++ b/lib/hash/rte_hash_crc.h @@ -16,10 +16,12 @@ extern "C" { #endif #include -#include -#include + #include #include +#include +#include +#include #include "rte_crc_sw.h" @@ -33,136 +35,67 @@ static uint8_t crc32_alg = CRC32_SW; #if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) #include "rte_crc_arm64.h" -#else +#elif defined(RTE_ARCH_X86) #include "rte_crc_x86.h" +#else +#include "rte_crc_generic.h" +#endif /** - * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash + * Allow or disallow use of SSE4.2/ARMv8 intrinsics for CRC32 hash * calculation. * * @param alg * An OR of following flags: - * - (CRC32_SW) Don't use SSE4.2 intrinsics + * - (CRC32_SW) Don't use SSE4.2/ARMv8 intrinsics (default non-[x86/ARMv8]) * - (CRC32_SSE42) Use SSE4.2 intrinsics if available - * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default) + * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default x86) + * - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8) * */ static inline void rte_hash_crc_set_alg(uint8_t alg) { -#if defined(RTE_ARCH_X86) - if (alg == CRC32_SSE42_x64 && - !rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T)) - alg = CRC32_SSE42; -#endif - crc32_alg = alg; -} + crc32_alg = CRC32_SW; -/* Setting the best available algorithm */ -RTE_INIT(rte_hash_crc_init_alg) -{ - rte_hash_crc_set_alg(CRC32_SSE42_x64); -} + if (alg == CRC32_SW) + return; -/** - * Use single crc32 instruction to perform a hash on a byte value. - * Fall back to software crc32 implementation in case SSE4.2 is - * not supported - * - * @param data - * Data to perform hash on. - * @param init_val - * Value to initialise hash generator. - * @return - * 32bit calculated hash value. - */ -static inline uint32_t -rte_hash_crc_1byte(uint8_t data, uint32_t init_val) -{ -#if defined RTE_ARCH_X86 - if (likely(crc32_alg & CRC32_SSE42)) - return crc32c_sse42_u8(data, init_val); -#endif - - return crc32c_1byte(data, init_val); -} - -/** - * Use single crc32 instruction to perform a hash on a 2 bytes value. - * Fall back to software crc32 implementation in case SSE4.2 is - * not supported - * - * @param data - * Data to perform hash on. - * @param init_val - * Value to initialise hash generator. - * @return - * 32bit calculated hash value. - */ -static inline uint32_t -rte_hash_crc_2byte(uint16_t data, uint32_t init_val) -{ #if defined RTE_ARCH_X86 - if (likely(crc32_alg & CRC32_SSE42)) - return crc32c_sse42_u16(data, init_val); + if (!(alg & CRC32_SSE42_x64)) + RTE_LOG(WARNING, HASH, + "Unsupported CRC32 algorithm requested using CRC32_x64/CRC32_SSE42\n"); + if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T) || alg == CRC32_SSE42) + crc32_alg = CRC32_SSE42; + else + crc32_alg = CRC32_SSE42_x64; #endif - return crc32c_2bytes(data, init_val); -} - -/** - * Use single crc32 instruction to perform a hash on a 4 byte value. - * Fall back to software crc32 implementation in case SSE4.2 is - * not supported - * - * @param data - * Data to perform hash on. - * @param init_val - * Value to initialise hash generator. - * @return - * 32bit calculated hash value. - */ -static inline uint32_t -rte_hash_crc_4byte(uint32_t data, uint32_t init_val) -{ -#if defined RTE_ARCH_X86 - if (likely(crc32_alg & CRC32_SSE42)) - return crc32c_sse42_u32(data, init_val); +#if defined RTE_ARCH_ARM64 + if (!(alg & CRC32_ARM64)) + RTE_LOG(WARNING, HASH, + "Unsupported CRC32 algorithm requested using CRC32_ARM64\n"); + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32)) + crc32_alg = CRC32_ARM64; #endif - return crc32c_1word(data, init_val); + if (crc32_alg == CRC32_SW) + RTE_LOG(WARNING, HASH, + "Unsupported CRC32 algorithm requested using CRC32_SW\n"); } -/** - * Use single crc32 instruction to perform a hash on a 8 byte value. - * Fall back to software crc32 implementation in case SSE4.2 is - * not supported - * - * @param data - * Data to perform hash on. - * @param init_val - * Value to initialise hash generator. - * @return - * 32bit calculated hash value. - */ -static inline uint32_t -rte_hash_crc_8byte(uint64_t data, uint32_t init_val) +/* Setting the best available algorithm */ +RTE_INIT(rte_hash_crc_init_alg) { -#ifdef RTE_ARCH_X86_64 - if (likely(crc32_alg == CRC32_SSE42_x64)) - return crc32c_sse42_u64(data, init_val); -#endif - -#if defined RTE_ARCH_X86 - if (likely(crc32_alg & CRC32_SSE42)) - return crc32c_sse42_u64_mimic(data, init_val); +#if defined(RTE_ARCH_X86) + rte_hash_crc_set_alg(CRC32_SSE42_x64); +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) + rte_hash_crc_set_alg(CRC32_ARM64); +#else + rte_hash_crc_set_alg(CRC32_SW); #endif - - return crc32c_2words(data, init_val); } -#endif - /** * Calculate CRC32 hash on user-supplied byte array. * -- 2.25.1