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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.236 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.236; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.236) by DM6NAM11FT015.mail.protection.outlook.com (10.13.172.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5293.13 via Frontend Transport; Thu, 26 May 2022 02:50:00 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Thu, 26 May 2022 02:49:59 +0000 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 25 May 2022 19:49:57 -0700 From: Rongwei Liu To: , , , CC: , Subject: [PATCH v1] net/mlx5: add Rx drop counters to xstats Date: Thu, 26 May 2022 05:49:41 +0300 Message-ID: <20220526024941.1296966-1-rongweil@nvidia.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4aff390d-eb9e-4a79-300b-08da3ec26d4a X-MS-TrafficTypeDiagnostic: SA0PR12MB4431:EE_ X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 May 2022 02:50:00.3252 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4aff390d-eb9e-4a79-300b-08da3ec26d4a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT015.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4431 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add two kinds of Rx drop counters to DPDK xstats which are physical port scope. 1. rx_prio[0-7]_buf_discard The number of unicast packets dropped due to lack of shared buffer resources. 2. rx_prio[0-7]_cong_discard The number of packets that is dropped by the Weighted Random Early Detection (WRED) function. Prio[0-7] is determined by VLAN PCP value which is 0 by default. Both counters are retrieved from kernel ethtool API which calls PRM command finally. Signed-off-by: Rongwei Liu Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/linux/mlx5_ethdev_os.c | 66 ++++++++++++++++++++++++- drivers/net/mlx5/mlx5_defs.h | 2 +- 2 files changed, 66 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_ethdev_os.c b/drivers/net/mlx5/linux/mlx5_ethdev_os.c index 8fe73f1adb..6fbfcfad48 100644 --- a/drivers/net/mlx5/linux/mlx5_ethdev_os.c +++ b/drivers/net/mlx5/linux/mlx5_ethdev_os.c @@ -1526,6 +1526,70 @@ static const struct mlx5_counter_ctrl mlx5_counters_init[] = { .dpdk_name = "rx_phy_discard_packets", .ctr_name = "rx_discards_phy", }, + { + .dpdk_name = "rx_prio0_buf_discard_packets", + .ctr_name = "rx_prio0_buf_discard", + }, + { + .dpdk_name = "rx_prio1_buf_discard_packets", + .ctr_name = "rx_prio1_buf_discard", + }, + { + .dpdk_name = "rx_prio2_buf_discard_packets", + .ctr_name = "rx_prio2_buf_discard", + }, + { + .dpdk_name = "rx_prio3_buf_discard_packets", + .ctr_name = "rx_prio3_buf_discard", + }, + { + .dpdk_name = "rx_prio4_buf_discard_packets", + .ctr_name = "rx_prio4_buf_discard", + }, + { + .dpdk_name = "rx_prio5_buf_discard_packets", + .ctr_name = "rx_prio5_buf_discard", + }, + { + .dpdk_name = "rx_prio6_buf_discard_packets", + .ctr_name = "rx_prio6_buf_discard", + }, + { + .dpdk_name = "rx_prio7_buf_discard_packets", + .ctr_name = "rx_prio7_buf_discard", + }, + { + .dpdk_name = "rx_prio0_cong_discard_packets", + .ctr_name = "rx_prio0_cong_discard", + }, + { + .dpdk_name = "rx_prio1_cong_discard_packets", + .ctr_name = "rx_prio1_cong_discard", + }, + { + .dpdk_name = "rx_prio2_cong_discard_packets", + .ctr_name = "rx_prio2_cong_discard", + }, + { + .dpdk_name = "rx_prio3_cong_discard_packets", + .ctr_name = "rx_prio3_cong_discard", + }, + { + .dpdk_name = "rx_prio4_cong_discard_packets", + .ctr_name = "rx_prio4_cong_discard", + }, + { + .dpdk_name = "rx_prio5_cong_discard_packets", + .ctr_name = "rx_prio5_cong_discard", + }, + { + .dpdk_name = "rx_prio6_cong_discard_packets", + .ctr_name = "rx_prio6_cong_discard", + }, + { + .dpdk_name = "rx_prio7_cong_discard_packets", + .ctr_name = "rx_prio7_cong_discard", + }, { .dpdk_name = "tx_phy_bytes", .ctr_name = "tx_bytes_phy", @@ -1625,6 +1689,7 @@ mlx5_os_stats_init(struct rte_eth_dev *dev) } } /* Add dev counters. */ + MLX5_ASSERT(xstats_ctrl->mlx5_stats_n <= MLX5_MAX_XSTATS); for (i = 0; i != xstats_n; ++i) { if (mlx5_counters_init[i].dev) { unsigned int idx = xstats_ctrl->mlx5_stats_n++; @@ -1633,7 +1698,6 @@ mlx5_os_stats_init(struct rte_eth_dev *dev) xstats_ctrl->hw_stats[idx] = 0; } } - MLX5_ASSERT(xstats_ctrl->mlx5_stats_n <= MLX5_MAX_XSTATS); xstats_ctrl->stats_n = dev_stats_n; /* Copy to base at first time. */ ret = mlx5_os_read_dev_counters(dev, xstats_ctrl->base); diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h index f5c6f23d56..018d3f0f0c 100644 --- a/drivers/net/mlx5/mlx5_defs.h +++ b/drivers/net/mlx5/mlx5_defs.h @@ -47,7 +47,7 @@ #define MLX5_ALARM_TIMEOUT_US 100000 /* Maximum number of extended statistics counters. */ -#define MLX5_MAX_XSTATS 32 +#define MLX5_MAX_XSTATS 64 /* Maximum Packet headers size (L2+L3+L4) for TSO. */ #define MLX5_MAX_TSO_HEADER 192U -- 2.27.0