From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E6B91A034C; Sat, 4 Jun 2022 16:03:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 89DE24021E; Sat, 4 Jun 2022 16:03:35 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 9990E40041 for ; Sat, 4 Jun 2022 16:03:33 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 254Ch4Xc010623; Sat, 4 Jun 2022 07:03:32 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=fyIUfzLDaR0nt6DVZ2kEBtxmduQGbQXuMF3ZsEQgl8s=; b=GE3N3bBr6sW41OtNdI93nNKpfb4ZPmtpjmOOwDjoFhdFJf3gSNNDSnoEjGvJc9TG3o0O 8bxxEOEQHVGaaJ/JfrynHtAuhZHf873qwsCL88ytJbuMGfXSjzmPK0+MEpB+ANDUVWOu VCt2q93JaGgHcRQiTsfz2TUQ8A/R2LUu+74w3WJbA3ALntLoPQreCXI42pA0LcpqEJOT K9OaSLQfsqXsTAQ65BGjr2ZJpLWx9bOqe6qZqHiaCTBAeb1465Lo+XlJDTg43mMrt63u I5LKWjN9mRx1l1adSfOvg2GObp5EPYerKUCTejn7mDZSY/bElXWh+m81TyRaH4IBH3ju pw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3gg6wq06f1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sat, 04 Jun 2022 07:03:32 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 4 Jun 2022 07:03:30 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 4 Jun 2022 07:03:30 -0700 Received: from localhost.localdomain (unknown [10.28.34.39]) by maili.marvell.com (Postfix) with ESMTP id DCAA83F70AE; Sat, 4 Jun 2022 07:03:28 -0700 (PDT) From: Tomasz Duszynski To: , Jakub Palider , Tomasz Duszynski CC: , Subject: [PATCH] raw/cnxk_gpio: allow controlling existing GPIO Date: Sat, 4 Jun 2022 16:03:23 +0200 Message-ID: <20220604140323.3380810-1-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: IaAvoH3EeVrSY-dpLMJ5LqrMph-S5krW X-Proofpoint-GUID: IaAvoH3EeVrSY-dpLMJ5LqrMph-S5krW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-06-04_04,2022-06-03_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Controlling existing GPIO should be normally frowned upon because we want to avoid situation where multiple contenders modify GPIO state simultaneously. Still there might be situations where this is actually needed. Restarting killed application being an example here. So relax current restrictions and respect user needs. Signed-off-by: Tomasz Duszynski --- drivers/raw/cnxk_gpio/cnxk_gpio.c | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/drivers/raw/cnxk_gpio/cnxk_gpio.c b/drivers/raw/cnxk_gpio/cnxk_gpio.c index 9577753851..d759ed82d4 100644 --- a/drivers/raw/cnxk_gpio/cnxk_gpio.c +++ b/drivers/raw/cnxk_gpio/cnxk_gpio.c @@ -4,6 +4,7 @@ #include #include +#include #include #include @@ -277,6 +278,17 @@ cnxk_gpio_lookup(struct cnxk_gpiochip *gpiochip, uint16_t queue) return gpiochip->gpios[gpio]; } +static bool +cnxk_gpio_exists(int num) +{ + char buf[CNXK_GPIO_BUFSZ]; + struct stat st; + + snprintf(buf, sizeof(buf), "%s/gpio%d", CNXK_GPIO_CLASS_PATH, num); + + return !stat(buf, &st); +} + static int cnxk_gpio_queue_setup(struct rte_rawdev *dev, uint16_t queue_id, rte_rawdev_obj_t queue_conf, size_t queue_conf_size) @@ -304,11 +316,15 @@ cnxk_gpio_queue_setup(struct rte_rawdev *dev, uint16_t queue_id, gpio->num = num + gpiochip->base; gpio->gpiochip = gpiochip; - snprintf(buf, sizeof(buf), "%s/export", CNXK_GPIO_CLASS_PATH); - ret = cnxk_gpio_write_attr_int(buf, gpio->num); - if (ret) { - rte_free(gpio); - return ret; + if (!cnxk_gpio_exists(gpio->num)) { + snprintf(buf, sizeof(buf), "%s/export", CNXK_GPIO_CLASS_PATH); + ret = cnxk_gpio_write_attr_int(buf, gpio->num); + if (ret) { + rte_free(gpio); + return ret; + } + } else { + RTE_LOG(WARNING, PMD, "using existing gpio%d\n", gpio->num); } gpiochip->gpios[num] = gpio; -- 2.25.1