From: Min Zhou <zhoumin@loongson.cn>
To: thomas@monjalon.net, david.marchand@redhat.com,
bruce.richardson@intel.com, anatoly.burakov@intel.com,
qiming.yang@intel.com, Yuying.Zhang@intel.com,
jgrajcia@cisco.com, konstantin.v.ananyev@yandex.ru
Cc: dev@dpdk.org, maobibo@loongson.cn
Subject: [v3 00/24] Support LoongArch architecture
Date: Mon, 6 Jun 2022 21:10:30 +0800 [thread overview]
Message-ID: <20220606131054.2097526-1-zhoumin@loongson.cn> (raw)
Dear team,
The following patch set is intended to support DPDK running on LoongArch
architecture.
LoongArch is the general processor architecture of Loongson and is a new
RISC ISA, which is a bit like MIPS or RISC-V.
The online documents of LoongArch are here:
https://loongson.github.io/LoongArch-Documentation/README-EN.html
The latest cross compile tool chain can be downloaded from:
https://github.com/loongson/build-tools
v3:
- add URL for cross compile tool chain
- remove rte_lpm_lsx.h which was a dummy vector implementation
because there is already a scalar implementation, thanks to
Michal Mazurek
- modify the name of compiler for cross compiling
- remove useless variable in meson.build
v2:
- use standard atomics of toolchain to implement
atomic operations
- implement spinlock based on standard atomics
Min Zhou (24):
eal/loongarch: add atomic operations for LoongArch
eal/loongarch: add byte order operations for LoongArch
eal/loongarch: add cpu cycle operations for LoongArch
eal/loongarch: add prefetch operations for LoongArch
eal/loongarch: add spinlock operations for LoongArch
eal/loongarch: add cpu flag checks for LoongArch
eal/loongarch: add dummy vector memcpy for LoongArch
eal/loongarch: add io operations for LoongArch
eal/loongarch: add mcslock operations for LoongArch
eal/loongarch: add pause operations for LoongArch
eal/loongarch: add pflock operations for LoongArch
eal/loongarch: add rwlock operations for LoongArch
eal/loongarch: add ticketlock operations for LoongArch
eal/loongarch: add power operations for LoongArch
eal/loongarch: add hypervisor operations for LoongArch
mem: add huge page size definition for LoongArch
eal/linux: set eal base address for LoongArch
meson: introduce LoongArch architecture
test/xmmt_ops: add dummy vector implementation for LoongArch
ixgbe: add dummy vector implementation for LoongArch
i40e: add dummy vector implementation for LoongArch
tap: add system call number for LoongArch
memif: add system call number for LoongArch
maintainers: claim responsibility for LoongArch
MAINTAINERS | 9 +
app/test/test_xmmt_ops.h | 17 ++
.../loongarch/loongarch_loongarch64_linux_gcc | 16 ++
config/loongarch/meson.build | 43 +++
drivers/net/i40e/i40e_rxtx_vec_lsx.c | 54 ++++
drivers/net/i40e/meson.build | 2 +
drivers/net/ixgbe/ixgbe_rxtx_vec_lsx.c | 60 +++++
drivers/net/ixgbe/meson.build | 2 +
drivers/net/memif/rte_eth_memif.h | 2 +-
drivers/net/tap/tap_bpf.h | 2 +-
lib/eal/include/rte_memory.h | 1 +
lib/eal/include/rte_memzone.h | 1 +
lib/eal/linux/eal_memory.c | 4 +
lib/eal/loongarch/include/meson.build | 21 ++
lib/eal/loongarch/include/rte_atomic.h | 253 ++++++++++++++++++
lib/eal/loongarch/include/rte_byteorder.h | 46 ++++
lib/eal/loongarch/include/rte_cpuflags.h | 39 +++
lib/eal/loongarch/include/rte_cycles.h | 53 ++++
lib/eal/loongarch/include/rte_io.h | 18 ++
lib/eal/loongarch/include/rte_mcslock.h | 18 ++
lib/eal/loongarch/include/rte_memcpy.h | 193 +++++++++++++
lib/eal/loongarch/include/rte_pause.h | 24 ++
lib/eal/loongarch/include/rte_pflock.h | 17 ++
.../loongarch/include/rte_power_intrinsics.h | 20 ++
lib/eal/loongarch/include/rte_prefetch.h | 47 ++++
lib/eal/loongarch/include/rte_rwlock.h | 42 +++
lib/eal/loongarch/include/rte_spinlock.h | 90 +++++++
lib/eal/loongarch/include/rte_ticketlock.h | 18 ++
lib/eal/loongarch/include/rte_vect.h | 46 ++++
lib/eal/loongarch/meson.build | 11 +
lib/eal/loongarch/rte_cpuflags.c | 94 +++++++
lib/eal/loongarch/rte_cycles.c | 45 ++++
lib/eal/loongarch/rte_hypervisor.c | 11 +
lib/eal/loongarch/rte_power_intrinsics.c | 51 ++++
meson.build | 2 +
35 files changed, 1370 insertions(+), 2 deletions(-)
create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc
create mode 100644 config/loongarch/meson.build
create mode 100644 drivers/net/i40e/i40e_rxtx_vec_lsx.c
create mode 100644 drivers/net/ixgbe/ixgbe_rxtx_vec_lsx.c
create mode 100644 lib/eal/loongarch/include/meson.build
create mode 100644 lib/eal/loongarch/include/rte_atomic.h
create mode 100644 lib/eal/loongarch/include/rte_byteorder.h
create mode 100644 lib/eal/loongarch/include/rte_cpuflags.h
create mode 100644 lib/eal/loongarch/include/rte_cycles.h
create mode 100644 lib/eal/loongarch/include/rte_io.h
create mode 100644 lib/eal/loongarch/include/rte_mcslock.h
create mode 100644 lib/eal/loongarch/include/rte_memcpy.h
create mode 100644 lib/eal/loongarch/include/rte_pause.h
create mode 100644 lib/eal/loongarch/include/rte_pflock.h
create mode 100644 lib/eal/loongarch/include/rte_power_intrinsics.h
create mode 100644 lib/eal/loongarch/include/rte_prefetch.h
create mode 100644 lib/eal/loongarch/include/rte_rwlock.h
create mode 100644 lib/eal/loongarch/include/rte_spinlock.h
create mode 100644 lib/eal/loongarch/include/rte_ticketlock.h
create mode 100644 lib/eal/loongarch/include/rte_vect.h
create mode 100644 lib/eal/loongarch/meson.build
create mode 100644 lib/eal/loongarch/rte_cpuflags.c
create mode 100644 lib/eal/loongarch/rte_cycles.c
create mode 100644 lib/eal/loongarch/rte_hypervisor.c
create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c
--
2.31.1
next reply other threads:[~2022-06-06 13:11 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-06 13:10 Min Zhou [this message]
2022-06-06 13:10 ` [v3 01/24] eal/loongarch: add atomic operations for LoongArch Min Zhou
2022-07-20 10:16 ` zhoumin
2022-06-06 13:10 ` [v3 02/24] eal/loongarch: add byte order " Min Zhou
2022-06-06 13:10 ` [v3 03/24] eal/loongarch: add cpu cycle " Min Zhou
2022-06-06 13:10 ` [v3 04/24] eal/loongarch: add prefetch " Min Zhou
2022-06-06 13:10 ` [v3 05/24] eal/loongarch: add spinlock " Min Zhou
2022-06-06 13:10 ` [v3 06/24] eal/loongarch: add cpu flag checks " Min Zhou
2022-06-06 13:10 ` [v3 07/24] eal/loongarch: add dummy vector memcpy " Min Zhou
2022-06-06 13:10 ` [v3 08/24] eal/loongarch: add io operations " Min Zhou
2022-06-06 13:10 ` [v3 09/24] eal/loongarch: add mcslock " Min Zhou
2022-06-06 13:10 ` [v3 10/24] eal/loongarch: add pause " Min Zhou
2022-06-06 13:10 ` [v3 11/24] eal/loongarch: add pflock " Min Zhou
2022-06-06 13:10 ` [v3 12/24] eal/loongarch: add rwlock " Min Zhou
2022-06-06 13:10 ` [v3 13/24] eal/loongarch: add ticketlock " Min Zhou
2022-06-06 13:10 ` [v3 14/24] eal/loongarch: add power " Min Zhou
2022-06-06 13:10 ` [v3 15/24] eal/loongarch: add hypervisor " Min Zhou
2022-06-06 13:10 ` [v3 16/24] mem: add huge page size definition " Min Zhou
2022-06-06 13:10 ` [v3 17/24] eal/linux: set eal base address " Min Zhou
2022-06-06 13:10 ` [v3 18/24] meson: introduce LoongArch architecture Min Zhou
2022-06-06 13:10 ` [v3 19/24] test/xmmt_ops: add dummy vector implementation for LoongArch Min Zhou
2022-06-06 13:10 ` [v3 20/24] ixgbe: " Min Zhou
2022-06-06 13:10 ` [v3 21/24] i40e: " Min Zhou
2022-06-06 13:10 ` [v3 22/24] tap: add system call number " Min Zhou
2022-06-06 13:10 ` [v3 23/24] memif: " Min Zhou
2022-06-06 13:10 ` [v3 24/24] maintainers: claim responsibility " Min Zhou
2022-07-20 16:33 ` [v3 00/24] Support LoongArch architecture David Marchand
2022-07-21 10:33 ` zhoumin
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