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From: Min Zhou <zhoumin@loongson.cn>
To: thomas@monjalon.net, david.marchand@redhat.com,
	bruce.richardson@intel.com, anatoly.burakov@intel.com,
	qiming.yang@intel.com, Yuying.Zhang@intel.com,
	jgrajcia@cisco.com, konstantin.v.ananyev@yandex.ru
Cc: dev@dpdk.org, maobibo@loongson.cn
Subject: [v3 18/24] meson: introduce LoongArch architecture
Date: Mon,  6 Jun 2022 21:10:48 +0800	[thread overview]
Message-ID: <20220606131054.2097526-19-zhoumin@loongson.cn> (raw)
In-Reply-To: <20220606131054.2097526-1-zhoumin@loongson.cn>

This patch adds some meson.build files for building DPDK on
LoongArch architecture.

Signed-off-by: Min Zhou <zhoumin@loongson.cn>
---
 .../loongarch/loongarch_loongarch64_linux_gcc | 16 +++++++
 config/loongarch/meson.build                  | 43 +++++++++++++++++++
 lib/eal/loongarch/include/meson.build         | 21 +++++++++
 lib/eal/loongarch/meson.build                 | 11 +++++
 meson.build                                   |  2 +
 5 files changed, 93 insertions(+)
 create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc
 create mode 100644 config/loongarch/meson.build
 create mode 100644 lib/eal/loongarch/include/meson.build
 create mode 100644 lib/eal/loongarch/meson.build

diff --git a/config/loongarch/loongarch_loongarch64_linux_gcc b/config/loongarch/loongarch_loongarch64_linux_gcc
new file mode 100644
index 0000000000..0c44ae96e6
--- /dev/null
+++ b/config/loongarch/loongarch_loongarch64_linux_gcc
@@ -0,0 +1,16 @@
+[binaries]
+c = 'loongarch64-unknown-linux-gnu-gcc'
+cpp = 'loongarch64-unknown-linux-gnu-cpp'
+ar = 'loongarch64-unknown-linux-gnu-gcc-ar'
+strip = 'loongarch64-unknown-linux-gnu-strip'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'loongarch64'
+cpu = '3a5000'
+endian = 'little'
+
+[properties]
+implementor_id = 'generic'
+implementor_pn = 'default'
diff --git a/config/loongarch/meson.build b/config/loongarch/meson.build
new file mode 100644
index 0000000000..d58e1ea6e9
--- /dev/null
+++ b/config/loongarch/meson.build
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2022 Loongson Technology Corporation Limited
+
+if not dpdk_conf.get('RTE_ARCH_64')
+	error('Only 64-bit compiles are supported for this platform type')
+endif
+dpdk_conf.set('RTE_ARCH', 'loongarch')
+dpdk_conf.set('RTE_ARCH_LOONGARCH', 1)
+dpdk_conf.set('RTE_ARCH_NO_VECTOR', 1)
+
+machine_args_generic = [
+    ['default', ['-march=loongarch64']],
+]
+
+flags_generic = [
+    ['RTE_MACHINE', '"loongarch64"'],
+    ['RTE_MAX_LCORE', 64],
+    ['RTE_MAX_NUMA_NODES', 16],
+    ['RTE_CACHE_LINE_SIZE', 64]]
+
+impl_generic = ['Generic loongarch', flags_generic, machine_args_generic]
+
+machine = []
+machine_args = []
+
+machine = impl_generic
+impl_pn = 'default'
+
+message('Implementer : ' + machine[0])
+foreach flag: machine[1]
+    if flag.length() > 0
+dpdk_conf.set(flag[0], flag[1])
+    endif
+endforeach
+
+foreach marg: machine[2]
+    if marg[0] == impl_pn
+        foreach f: marg[1]
+           machine_args += f
+        endforeach
+    endif
+endforeach
+message(machine_args)
diff --git a/lib/eal/loongarch/include/meson.build b/lib/eal/loongarch/include/meson.build
new file mode 100644
index 0000000000..d5699c5373
--- /dev/null
+++ b/lib/eal/loongarch/include/meson.build
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2022 Loongson Technology Corporation Limited
+
+arch_headers = files(
+	'rte_atomic.h',
+	'rte_byteorder.h',
+	'rte_cpuflags.h',
+	'rte_cycles.h',
+	'rte_io.h',
+	'rte_mcslock.h',
+	'rte_memcpy.h',
+	'rte_pause.h',
+	'rte_pflock.h',
+	'rte_power_intrinsics.h',
+	'rte_prefetch.h',
+	'rte_rwlock.h',
+	'rte_spinlock.h',
+	'rte_ticketlock.h',
+	'rte_vect.h',
+)
+install_headers(arch_headers, subdir: get_option('include_subdir_arch'))
diff --git a/lib/eal/loongarch/meson.build b/lib/eal/loongarch/meson.build
new file mode 100644
index 0000000000..e14b1ed431
--- /dev/null
+++ b/lib/eal/loongarch/meson.build
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2022 Loongson Technology Corporation Limited
+
+subdir('include')
+
+sources += files(
+	'rte_cpuflags.c',
+	'rte_cycles.c',
+	'rte_hypervisor.c',
+	'rte_power_intrinsics.c',
+)
diff --git a/meson.build b/meson.build
index 5561171617..bfad7b28a0 100644
--- a/meson.build
+++ b/meson.build
@@ -52,6 +52,8 @@ elif host_machine.cpu_family().startswith('arm') or host_machine.cpu_family().st
     arch_subdir = 'arm'
 elif host_machine.cpu_family().startswith('ppc')
     arch_subdir = 'ppc'
+elif host_machine.cpu_family().startswith('loongarch')
+    arch_subdir = 'loongarch'
 endif
 
 # configure the build, and make sure configs here and in config folder are
-- 
2.31.1


  parent reply	other threads:[~2022-06-06 13:18 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-06 13:10 [v3 00/24] Support " Min Zhou
2022-06-06 13:10 ` [v3 01/24] eal/loongarch: add atomic operations for LoongArch Min Zhou
2022-07-20 10:16   ` zhoumin
2022-06-06 13:10 ` [v3 02/24] eal/loongarch: add byte order " Min Zhou
2022-06-06 13:10 ` [v3 03/24] eal/loongarch: add cpu cycle " Min Zhou
2022-06-06 13:10 ` [v3 04/24] eal/loongarch: add prefetch " Min Zhou
2022-06-06 13:10 ` [v3 05/24] eal/loongarch: add spinlock " Min Zhou
2022-06-06 13:10 ` [v3 06/24] eal/loongarch: add cpu flag checks " Min Zhou
2022-06-06 13:10 ` [v3 07/24] eal/loongarch: add dummy vector memcpy " Min Zhou
2022-06-06 13:10 ` [v3 08/24] eal/loongarch: add io operations " Min Zhou
2022-06-06 13:10 ` [v3 09/24] eal/loongarch: add mcslock " Min Zhou
2022-06-06 13:10 ` [v3 10/24] eal/loongarch: add pause " Min Zhou
2022-06-06 13:10 ` [v3 11/24] eal/loongarch: add pflock " Min Zhou
2022-06-06 13:10 ` [v3 12/24] eal/loongarch: add rwlock " Min Zhou
2022-06-06 13:10 ` [v3 13/24] eal/loongarch: add ticketlock " Min Zhou
2022-06-06 13:10 ` [v3 14/24] eal/loongarch: add power " Min Zhou
2022-06-06 13:10 ` [v3 15/24] eal/loongarch: add hypervisor " Min Zhou
2022-06-06 13:10 ` [v3 16/24] mem: add huge page size definition " Min Zhou
2022-06-06 13:10 ` [v3 17/24] eal/linux: set eal base address " Min Zhou
2022-06-06 13:10 ` Min Zhou [this message]
2022-06-06 13:10 ` [v3 19/24] test/xmmt_ops: add dummy vector implementation " Min Zhou
2022-06-06 13:10 ` [v3 20/24] ixgbe: " Min Zhou
2022-06-06 13:10 ` [v3 21/24] i40e: " Min Zhou
2022-06-06 13:10 ` [v3 22/24] tap: add system call number " Min Zhou
2022-06-06 13:10 ` [v3 23/24] memif: " Min Zhou
2022-06-06 13:10 ` [v3 24/24] maintainers: claim responsibility " Min Zhou
2022-07-20 16:33 ` [v3 00/24] Support LoongArch architecture David Marchand
2022-07-21 10:33   ` zhoumin

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