From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 96F6BA0553; Thu, 9 Jun 2022 17:20:55 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 87C42406B4; Thu, 9 Jun 2022 17:20:55 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 5C0CE40689 for ; Thu, 9 Jun 2022 17:20:53 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 259Aes3Z017914 for ; Thu, 9 Jun 2022 08:20:53 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=vzsnEnYsrUpCPM7aXBCAiqLUuigoSoYT3iYJiTex3o4=; b=MOVMipx7TbDTu3DpG+XDLqjEf36EHKbYlP86/8DvrMuCWYzqJspN/r8lbDV7EWsQo3WF i1wJb1ax4Th2b2KyeBarM/87J+S4rCJHHH8nk7gjOiR8qkqGDsInYeAjd+tJhIBRd9YE IIp1tbnKcM/sTDDInZpbxg3GmyFWa86AioQVr5Za/EHZU74c9J7kQR2jxWVb/Qho2s6z MWIfY/BZ//qy7jWUstcGvSRC+vuGoablKEXtRfGVNOUQV4R8NsuxEniXmnhl3n8yVBP+ EmpLMsqEK/JYWp44/4fCHjtCKkeImeyqD0WVKpWkSyoslvLq9ZuMKDdQfHbILkIaTVDq 1w== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3gkfars6m0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 09 Jun 2022 08:20:52 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 9 Jun 2022 08:20:51 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 9 Jun 2022 08:20:51 -0700 Received: from setup-1.caveonetworks.com (unknown [10.106.27.161]) by maili.marvell.com (Postfix) with ESMTP id 2D2313F7052; Thu, 9 Jun 2022 08:20:51 -0700 (PDT) From: Sathesh B Edara To: , , , "Nalla Pradeep" , Radha Mohan Chintakuntla , Veerasenareddy Burru CC: Subject: [PATCH] net/octeontx_ep: updated ethdev ops Date: Thu, 9 Jun 2022 08:19:53 -0700 Message-ID: <20220609151953.83802-1-sedara@marvell.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: Tgp_g_9isJ4-6_LOt1FsUQWANLEW3nye X-Proofpoint-ORIG-GUID: Tgp_g_9isJ4-6_LOt1FsUQWANLEW3nye X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-06-09_11,2022-06-09_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Updated ethdev ops support for link_update(), stats_get() and stats_reset() Signed-off-by: Sathesh B Edara --- drivers/net/octeontx_ep/otx_ep_ethdev.c | 69 +++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/net/octeontx_ep/otx_ep_ethdev.c b/drivers/net/octeontx_ep/otx_ep_ethdev.c index 806add246b..b8a3da63c0 100644 --- a/drivers/net/octeontx_ep/otx_ep_ethdev.c +++ b/drivers/net/octeontx_ep/otx_ep_ethdev.c @@ -337,6 +337,72 @@ otx_ep_tx_queue_release(struct rte_eth_dev *dev, uint16_t q_no) otx_ep_delete_iqs(tq->otx_ep_dev, tq->q_no); } +static int otx_ep_dev_stats_reset(struct rte_eth_dev *dev) +{ + struct otx_ep_device *otx_epvf = OTX_EP_DEV(dev); + uint32_t i; + + for (i = 0; i < otx_epvf->nb_tx_queues; i++) + memset(&otx_epvf->instr_queue[i]->stats, 0, + sizeof(struct otx_ep_iq_stats)); + + for (i = 0; i < otx_epvf->nb_rx_queues; i++) + memset(&otx_epvf->droq[i]->stats, 0, + sizeof(struct otx_ep_droq_stats)); + + return 0; +} + +static int otx_ep_dev_stats_get(struct rte_eth_dev *eth_dev, + struct rte_eth_stats *stats) +{ + struct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev); + struct otx_ep_iq_stats *ostats; + struct otx_ep_droq_stats *istats; + uint32_t i; + + memset(stats, 0, sizeof(struct rte_eth_stats)); + + for (i = 0; i < otx_epvf->nb_tx_queues; i++) { + ostats = &otx_epvf->instr_queue[i]->stats; + stats->q_opackets[i] = ostats->tx_pkts; + stats->q_obytes[i] = ostats->tx_bytes; + stats->opackets += ostats->tx_pkts; + stats->obytes += ostats->tx_bytes; + stats->oerrors += ostats->instr_dropped; + } + for (i = 0; i < otx_epvf->nb_rx_queues; i++) { + istats = &otx_epvf->droq[i]->stats; + stats->q_ipackets[i] = istats->pkts_received; + stats->q_ibytes[i] = istats->bytes_received; + stats->q_errors[i] = istats->rx_err; + stats->ipackets += istats->pkts_received; + stats->ibytes += istats->bytes_received; + stats->imissed += istats->rx_alloc_failure; + stats->ierrors += istats->rx_err; + stats->rx_nombuf += istats->rx_alloc_failure; + } + return 0; +} + +static int +otx_ep_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete) +{ + struct rte_eth_link link; + + RTE_SET_USED(wait_to_complete); + + if (!eth_dev->data->dev_started) + return 0; + + link.link_speed = RTE_ETH_SPEED_NUM_10G; + link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX; + link.link_autoneg = RTE_ETH_LINK_AUTONEG; + link.link_status = RTE_ETH_LINK_UP; + + return rte_eth_linkstatus_set(eth_dev, &link); +} + /* Define our ethernet definitions */ static const struct eth_dev_ops otx_ep_eth_dev_ops = { .dev_configure = otx_ep_dev_configure, @@ -347,6 +413,9 @@ static const struct eth_dev_ops otx_ep_eth_dev_ops = { .tx_queue_setup = otx_ep_tx_queue_setup, .tx_queue_release = otx_ep_tx_queue_release, .dev_infos_get = otx_ep_dev_info_get, + .link_update = otx_ep_link_update, + .stats_get = otx_ep_dev_stats_get, + .stats_reset = otx_ep_dev_stats_reset, }; static int -- 2.36.0