From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 20E7AA0553; Fri, 10 Jun 2022 10:30:47 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B68C84069C; Fri, 10 Jun 2022 10:30:46 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 3D85440689 for ; Fri, 10 Jun 2022 10:30:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654849844; x=1686385844; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=N9/LP57TyZHUUJJioi3AFYGVqfgzNLaG9nSiEKbKWHY=; b=glfMt8VAlzsq3MDcFKYu+FtPzLfquRmiXcIBMw2M6UuKY1D8Bbrg2aHt ozLdAsW2iYccc7i+Sd6DqDKRdZqxasEk59rTVGBwNdfbCXLhzwbtfoG3J BPskSJUc6LRB9PLwDEqhCjn9wDwiBPg0sAhMVE23z+PmQ3OC8wkpc4iH2 1OozzD2R29X5Us5Z28OmaRaj1tXMYoRnIq4GFmBQ77LTcAeGWnjoMxVF8 yVcWTREfPas0AlBw96Vke1nX8dKSCYi/FD3KyrIPMZS+R0APj4ce8FRPk IZti5I99aaj+nY8nkqiroA/BSXF6bYVgIUB3nzXaR2RLPq0e27VAc6erX Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10373"; a="276334862" X-IronPort-AV: E=Sophos;i="5.91,288,1647327600"; d="scan'208";a="276334862" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 01:30:40 -0700 X-IronPort-AV: E=Sophos;i="5.91,288,1647327600"; d="scan'208";a="638019080" Received: from intel-cd-odc-kevin.cd.intel.com ([10.240.178.191]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 01:30:37 -0700 From: Kevin Liu To: dev@dpdk.org Cc: Yuying.Zhang@intel.com, beilei.xing@intel.com, stevex.yang@intel.com, Robin Zhang , Kevin Liu Subject: [PATCH v7] net/i40e: add outer VLAN processing Date: Fri, 10 Jun 2022 16:29:44 +0000 Message-Id: <20220610162944.99526-1-kevinx.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220610155216.81289-1-kevinx.liu@intel.com> References: <20220610155216.81289-1-kevinx.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Robin Zhang Outer VLAN processing is supported after firmware v8.4, kernel driver also change the default behavior to support this feature. To align with kernel driver, add support for outer VLAN processing in DPDK. But it is forbidden for firmware to change the Inner/Outer VLAN configuration while there are MAC/VLAN filters in the switch table. Therefore, we need to clear the MAC table before setting config, and then restore the MAC table after setting. This will not impact on an old firmware. Signed-off-by: Robin Zhang Signed-off-by: Kevin Liu --- drivers/net/i40e/i40e_ethdev.c | 94 ++++++++++++++++++++++++++++++++-- drivers/net/i40e/i40e_ethdev.h | 3 ++ 2 files changed, 92 insertions(+), 5 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 755786dc10..4cae163cb9 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -2575,6 +2575,7 @@ i40e_dev_close(struct rte_eth_dev *dev) struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); struct rte_intr_handle *intr_handle = pci_dev->intr_handle; + struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; struct i40e_filter_control_settings settings; struct rte_flow *p_flow; uint32_t reg; @@ -2587,6 +2588,18 @@ i40e_dev_close(struct rte_eth_dev *dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; + /* + * It is a workaround, if the double VLAN is disabled when + * the program exits, an abnormal error will occur on the + * NIC. Need to enable double VLAN when dev is closed. + */ + if (pf->fw8_3gt) { + if (!(rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)) { + rxmode->offloads |= RTE_ETH_RX_OFFLOAD_VLAN_EXTEND; + i40e_vlan_offload_set(dev, RTE_ETH_VLAN_EXTEND_MASK); + } + } + ret = rte_eth_switch_domain_free(pf->switch_domain_id); if (ret) PMD_INIT_LOG(WARNING, "failed to free switch domain: %d", ret); @@ -3909,6 +3922,7 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev, struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); int qinq = dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND; + u16 sw_flags = 0, valid_flags = 0; int ret = 0; if ((vlan_type != RTE_ETH_VLAN_TYPE_INNER && @@ -3927,15 +3941,32 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev, /* 802.1ad frames ability is added in NVM API 1.7*/ if (hw->flags & I40E_HW_FLAG_802_1AD_CAPABLE) { if (qinq) { + if (pf->fw8_3gt) { + sw_flags = I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN; + valid_flags = I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN; + } if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER) hw->first_tag = rte_cpu_to_le_16(tpid); else if (vlan_type == RTE_ETH_VLAN_TYPE_INNER) hw->second_tag = rte_cpu_to_le_16(tpid); } else { - if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER) - hw->second_tag = rte_cpu_to_le_16(tpid); + /* + * If tpid is equal to 0x88A8, indicates that the + * disable double VLAN operation is in progress. + * Need set switch configuration back to default. + */ + if (pf->fw8_3gt && tpid == RTE_ETHER_TYPE_QINQ) { + sw_flags = 0; + valid_flags = I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN; + if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER) + hw->first_tag = rte_cpu_to_le_16(tpid); + } else { + if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER) + hw->second_tag = rte_cpu_to_le_16(tpid); + } } - ret = i40e_aq_set_switch_config(hw, 0, 0, 0, NULL); + ret = i40e_aq_set_switch_config(hw, sw_flags, + valid_flags, 0, NULL); if (ret != I40E_SUCCESS) { PMD_DRV_LOG(ERR, "Set switch config failed aq_err: %d", @@ -3987,8 +4018,13 @@ static int i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask) { struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); + struct i40e_mac_filter_info *mac_filter; struct i40e_vsi *vsi = pf->main_vsi; struct rte_eth_rxmode *rxmode; + struct i40e_mac_filter *f; + int i, num; + void *temp; + int ret; rxmode = &dev->data->dev_conf.rxmode; if (mask & RTE_ETH_VLAN_FILTER_MASK) { @@ -4007,6 +4043,33 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask) } if (mask & RTE_ETH_VLAN_EXTEND_MASK) { + i = 0; + num = vsi->mac_num; + mac_filter = rte_zmalloc("mac_filter_info_data", + num * sizeof(*mac_filter), 0); + if (mac_filter == NULL) { + PMD_DRV_LOG(ERR, "failed to allocate memory"); + return I40E_ERR_NO_MEMORY; + } + + /* + * Outer VLAN processing is supported after firmware v8.4, kernel driver + * also change the default behavior to support this feature. To align with + * kernel driver, set switch config in 'i40e_vlan_tpie_set' to support for + * outer VLAN processing. But it is forbidden for firmware to change the + * Inner/Outer VLAN configuration while there are MAC/VLAN filters in the + * switch table. Therefore, we need to clear the MAC table before setting + * config, and then restore the MAC table after setting. This feature is + * recommended to be used in firmware v8.6. + */ + /* Remove all existing mac */ + RTE_TAILQ_FOREACH_SAFE(f, &vsi->mac_list, next, temp) { + mac_filter[i] = f->mac_info; + ret = i40e_vsi_delete_mac(vsi, &f->mac_info.mac_addr); + if (ret) + PMD_DRV_LOG(ERR, "i40e vsi delete mac fail."); + i++; + } if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND) { i40e_vsi_config_double_vlan(vsi, TRUE); /* Set global registers with default ethertype. */ @@ -4014,9 +4077,19 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask) RTE_ETHER_TYPE_VLAN); i40e_vlan_tpid_set(dev, RTE_ETH_VLAN_TYPE_INNER, RTE_ETHER_TYPE_VLAN); - } - else + } else { + if (pf->fw8_3gt) + i40e_vlan_tpid_set(dev, RTE_ETH_VLAN_TYPE_OUTER, + RTE_ETHER_TYPE_QINQ); i40e_vsi_config_double_vlan(vsi, FALSE); + } + /* Restore all mac */ + for (i = 0; i < num; i++) { + ret = i40e_vsi_add_mac(vsi, &mac_filter[i]); + if (ret) + PMD_DRV_LOG(ERR, "i40e vsi add mac fail."); + } + rte_free(mac_filter); } if (mask & RTE_ETH_QINQ_STRIP_MASK) { @@ -4846,6 +4919,17 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev) return -EINVAL; } + /** + * Enable outer VLAN processing if firmware version is greater + * than v8.3 + */ + if (hw->aq.fw_maj_ver > 8 || + (hw->aq.fw_maj_ver == 8 && hw->aq.fw_min_ver > 3)) { + pf->fw8_3gt = true; + } else { + pf->fw8_3gt = false; + } + return 0; } diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index a1ebdc093c..fe943a45ff 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -1188,6 +1188,9 @@ struct i40e_pf { /* Switch Domain Id */ uint16_t switch_domain_id; + /* When firmware > 8.3, the enable flag for outer VLAN processing */ + bool fw8_3gt; + struct i40e_vf_msg_cfg vf_msg_cfg; uint64_t prev_rx_bytes; uint64_t prev_tx_bytes; -- 2.34.1