From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BC796A0032; Thu, 21 Jul 2022 14:51:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 45450427F4; Thu, 21 Jul 2022 14:51:58 +0200 (CEST) Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by mails.dpdk.org (Postfix) with ESMTP id 4EF10400D7 for ; Thu, 21 Jul 2022 14:51:55 +0200 (CEST) Received: from localhost.localdomain (unknown [10.2.5.185]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9DxH9LhS9liUZgsAA--.700S4; Thu, 21 Jul 2022 20:51:53 +0800 (CST) From: Min Zhou To: thomas@monjalon.net, david.marchand@redhat.com, bruce.richardson@intel.com, anatoly.burakov@intel.com, qiming.yang@intel.com, Yuying.Zhang@intel.com, jgrajcia@cisco.com, konstantin.v.ananyev@yandex.ru Cc: dev@dpdk.org, maobibo@loongson.cn Subject: [PATCH v4 02/24] eal/loongarch: add byte order operations for LoongArch Date: Thu, 21 Jul 2022 20:51:22 +0800 Message-Id: <20220721125144.4028113-3-zhoumin@loongson.cn> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220721125144.4028113-1-zhoumin@loongson.cn> References: <20220721125144.4028113-1-zhoumin@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: AQAAf9DxH9LhS9liUZgsAA--.700S4 X-Coremail-Antispam: 1UD129KBjvJXoW7AF43Jr4fur45tr45CrW3Wrg_yoW8CF47pF 15CFZxKr1rXr47t34Sy3W3Wrn8Zw1S9r1xK39rZrW3uF9rX3yfZr1qgrW7AryUuwn5urZ7 Xw4q9w4jga43Cw7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: 52kr3ztlq6z05rqj20fqof0/ X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds architecture specific byte order operations for LoongArch architecture. LoongArch bit designations are always little-endian. Signed-off-by: Min Zhou --- lib/eal/loongarch/include/rte_byteorder.h | 46 +++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 lib/eal/loongarch/include/rte_byteorder.h diff --git a/lib/eal/loongarch/include/rte_byteorder.h b/lib/eal/loongarch/include/rte_byteorder.h new file mode 100644 index 0000000000..2cda010256 --- /dev/null +++ b/lib/eal/loongarch/include/rte_byteorder.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2022 Loongson Technology Corporation Limited + */ + +#ifndef _RTE_BYTEORDER_LOONGARCH_H_ +#define _RTE_BYTEORDER_LOONGARCH_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "generic/rte_byteorder.h" + +#ifndef RTE_FORCE_INTRINSICS +#define rte_bswap16(x) rte_constant_bswap16(x) +#define rte_bswap32(x) rte_constant_bswap32(x) +#define rte_bswap64(x) rte_constant_bswap64(x) +#endif + +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN + +#define rte_cpu_to_le_16(x) (x) +#define rte_cpu_to_le_32(x) (x) +#define rte_cpu_to_le_64(x) (x) + +#define rte_cpu_to_be_16(x) rte_bswap16(x) +#define rte_cpu_to_be_32(x) rte_bswap32(x) +#define rte_cpu_to_be_64(x) rte_bswap64(x) + +#define rte_le_to_cpu_16(x) (x) +#define rte_le_to_cpu_32(x) (x) +#define rte_le_to_cpu_64(x) (x) + +#define rte_be_to_cpu_16(x) rte_bswap16(x) +#define rte_be_to_cpu_32(x) rte_bswap32(x) +#define rte_be_to_cpu_64(x) rte_bswap64(x) + +#else /* RTE_BIG_ENDIAN */ +#error "LoongArch not support big endian!" +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* _RTE_BYTEORDER_LOONGARCH_H_ */ -- 2.31.1