From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AD36FA00C2; Sun, 14 Aug 2022 20:46:53 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2408A4113C; Sun, 14 Aug 2022 20:46:48 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id AAAA8427EC for ; Sun, 14 Aug 2022 20:46:46 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 27EIkcJU030986; Sun, 14 Aug 2022 11:46:46 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=+mHsGBIQF+DK2HwiHyRBHOdU5fMVyBeT+BMsGyk7MOQ=; b=JlmrlnU8ZmgIosSqxCVvHtZPfZdnV7P79ctftLgb5eh8CdXNZXlq6hQLgdxYFOtTNyrn dRefEwZUBPP+7QNLdFt6ClhWgHI++evjbcH8rclrxIwk0lFYefpYd/Knj8WyjH2IYd4t st3xcHITZHEYPFt9drD6vHBux87u8UaS4Sx2x96JIOVu4c76Cl1lhfvCgqT3dDP6DGvF utO0/uaBualPor8wXjq3R9SewYYjTWTjqlSRmqaaHePN5+IMq3IBs8/vtEcsYhOvz2X7 jSrl3EW+k3Sv9rfwiP0KIQb/M5azNZLl4d4dgXGEhcsQ4tTjlPtiXue7SuNcXxChfOSZ jg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3hxbfkm1dv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sun, 14 Aug 2022 11:46:46 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 14 Aug 2022 11:46:43 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sun, 14 Aug 2022 11:46:43 -0700 Received: from localhost.localdomain (unknown [10.28.36.102]) by maili.marvell.com (Postfix) with ESMTP id D964B3F7052; Sun, 14 Aug 2022 11:46:39 -0700 (PDT) From: Akhil Goyal To: CC: , , , , , , , , , , , , , Akhil Goyal Subject: [PATCH 3/3] ethdev: add MACsec flow item Date: Mon, 15 Aug 2022 00:16:20 +0530 Message-ID: <20220814184620.512343-4-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220814184620.512343-1-gakhil@marvell.com> References: <20220814184620.512343-1-gakhil@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: IBYWPDJTtYs3w_f-pjaUFVxCNUwgFMCU X-Proofpoint-ORIG-GUID: IBYWPDJTtYs3w_f-pjaUFVxCNUwgFMCU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-14_11,2022-08-11_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org A new flow item is defined for MACsec flows which can be offloaded to an inline device. If the flow matches with MACsec header, device will process as per the security session created using rte_security APIs. If an error comes while MACsec processing in HW, PMD will notify with the events defined in this patch. Signed-off-by: Akhil Goyal --- lib/ethdev/rte_ethdev.h | 55 +++++++++++++++++++++++++++++++++++++++++ lib/ethdev/rte_flow.h | 18 ++++++++++++++ 2 files changed, 73 insertions(+) diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index de9e970d4d..24661b01e9 100644 --- a/lib/ethdev/rte_ethdev.h +++ b/lib/ethdev/rte_ethdev.h @@ -3864,6 +3864,61 @@ rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent, int rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt); +/** + * Subtypes for MACsec offload event(@ref RTE_ETH_EVENT_MACSEC) raised by + * Ethernet device. + */ +enum rte_eth_macsec_event_subtype { + RTE_ETH_MACSEC_SUBEVENT_UNKNOWN, + /* subevents of RTE_ETH_MACSEC_EVENT_SECTAG_VAL_ERR sectag validation events + * RTE_ETH_MACSEC_EVENT_RX_SECTAG_V_EQ1 + * Validation check: SecTag.TCI.V = 1 + * RTE_ETH_MACSEC_EVENT_RX_SECTAG_E_EQ0_C_EQ1 + * Validation check: SecTag.TCI.E = 0 && SecTag.TCI.C = 1 + * RTE_ETH_MACSEC_EVENT_RX_SECTAG_SL_GTE48 + * Validation check: SecTag.SL >= 'd48 + * RTE_ETH_MACSEC_EVENT_RX_SECTAG_ES_EQ1_SC_EQ1 + * Validation check: SecTag.TCI.ES = 1 && SecTag.TCI.SC = 1 + * RTE_ETH_MACSEC_EVENT_RX_SECTAG_SC_EQ1_SCB_EQ1 + * Validation check: SecTag.TCI.SC = 1 && SecTag.TCI.SCB = 1 + */ + RTE_ETH_MACSEC_SUBEVENT_RX_SECTAG_V_EQ1, + RTE_ETH_MACSEC_SUBEVENT_RX_SECTAG_E_EQ0_C_EQ1, + RTE_ETH_MACSEC_SUBEVENT_RX_SECTAG_SL_GTE48, + RTE_ETH_MACSEC_SUBEVENT_RX_SECTAG_ES_EQ1_SC_EQ1, + RTE_ETH_MACSEC_SUBEVENT_RX_SECTAG_SC_EQ1_SCB_EQ1, +}; + +enum rte_eth_macsec_event_type { + RTE_ETH_MACSEC_EVENT_UNKNOWN, + RTE_ETH_MACSEC_EVENT_SECTAG_VAL_ERR, + RTE_ETH_MACSEC_EVENT_RX_SA_PN_HARD_EXP, + RTE_ETH_MACSEC_EVENT_RX_SA_PN_SOFT_EXP, + RTE_ETH_MACSEC_EVENT_TX_SA_PN_HARD_EXP, + RTE_ETH_MACSEC_EVENT_TX_SA_PN_SOFT_EXP, + /* Notifies Invalid SA event */ + RTE_ETH_MACSEC_EVENT_SA_NOT_VALID, +}; + +/** + * Descriptor for @ref RTE_ETH_EVENT_MACSEC event. Used by eth dev to send extra + * information of the MACsec offload event. + */ +struct rte_eth_event_macsec_desc { + enum rte_eth_macsec_event_type type; + enum rte_eth_macsec_event_subtype subtype; + /** + * Event specific metadata. + * + * For the following events, *userdata* registered + * with the *rte_security_session* would be returned + * as metadata, + * + * @see struct rte_security_session_conf + */ + uint64_t metadata; +}; + /** * Subtypes for IPsec offload event(@ref RTE_ETH_EVENT_IPSEC) raised by * eth device. diff --git a/lib/ethdev/rte_flow.h b/lib/ethdev/rte_flow.h index a79f1e7ef0..4114c84a02 100644 --- a/lib/ethdev/rte_flow.h +++ b/lib/ethdev/rte_flow.h @@ -35,6 +35,7 @@ #include #include #include +#include #ifdef __cplusplus extern "C" { @@ -668,6 +669,13 @@ enum rte_flow_item_type { * See struct rte_flow_item_gre_opt. */ RTE_FLOW_ITEM_TYPE_GRE_OPTION, + + /** + * Matches MACsec Ethernet Header. + * + * See struct rte_flow_item_macsec. + */ + RTE_FLOW_ITEM_TYPE_MACSEC, }; /** @@ -1214,6 +1222,16 @@ struct rte_flow_item_gre_opt { struct rte_gre_hdr_opt_sequence sequence; }; +/** + * RTE_FLOW_ITEM_TYPE_MACSEC. + * + * Matches MACsec header. + */ +struct rte_flow_item_macsec { + struct rte_macsec_hdr macsec_hdr; +}; + + /** * RTE_FLOW_ITEM_TYPE_FUZZY * -- 2.25.1