From: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
To: dev@dpdk.org
Subject: [PATCH 4/7] pipeline: support direct registers on the control path
Date: Fri, 26 Aug 2022 10:36:02 +0000 [thread overview]
Message-ID: <20220826103605.1579589-5-cristian.dumitrescu@intel.com> (raw)
In-Reply-To: <20220826103605.1579589-1-cristian.dumitrescu@intel.com>
Add pipeline control path API to read/write direct registers. These
registers are identified by a table key, whose entry ID is used as the
index into the register array.
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
---
lib/pipeline/rte_swx_ctl.h | 52 ++++++++
lib/pipeline/rte_swx_pipeline.c | 214 ++++++++++++++++++++++++++++++++
lib/pipeline/version.map | 2 +
3 files changed, 268 insertions(+)
diff --git a/lib/pipeline/rte_swx_ctl.h b/lib/pipeline/rte_swx_ctl.h
index 0694df557a..1b47820441 100644
--- a/lib/pipeline/rte_swx_ctl.h
+++ b/lib/pipeline/rte_swx_ctl.h
@@ -1237,6 +1237,58 @@ rte_swx_ctl_pipeline_regarray_write(struct rte_swx_pipeline *p,
uint32_t regarray_index,
uint64_t value);
+/**
+ * Register read with table key lookup
+ *
+ * @param[in] p
+ * Pipeline handle.
+ * @param[in] regarray_name
+ * Register array name.
+ * @param[in] table_name
+ * Regular or learner table name.
+ * @param[in] table_key
+ * Table key.
+ * @param[out] value
+ * Current register value.
+ * @return
+ * 0 on success or the following error codes otherwise:
+ * -EINVAL: Invalid argument;
+ * -ENOMEM: Not enough memory.
+ */
+__rte_experimental
+int
+rte_swx_ctl_pipeline_regarray_read_with_key(struct rte_swx_pipeline *p,
+ const char *regarray_name,
+ const char *table_name,
+ uint8_t *table_key,
+ uint64_t *value);
+
+/**
+ * Register write with table key lookup
+ *
+ * @param[in] p
+ * Pipeline handle.
+ * @param[in] regarray_name
+ * Register array name.
+ * @param[in] table_name
+ * Regular or learner table name.
+ * @param[in] table_key
+ * Table key.
+ * @param[in] value
+ * Value to be written to the register.
+ * @return
+ * 0 on success or the following error codes otherwise:
+ * -EINVAL: Invalid argument;
+ * -ENOMEM: Not enough memory.
+ */
+__rte_experimental
+int
+rte_swx_ctl_pipeline_regarray_write_with_key(struct rte_swx_pipeline *p,
+ const char *regarray_name,
+ const char *table_name,
+ uint8_t *table_key,
+ uint64_t value);
+
/*
* Meter Array Query and Configuration API.
*/
diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c
index ec8268b7f8..e726bf1575 100644
--- a/lib/pipeline/rte_swx_pipeline.c
+++ b/lib/pipeline/rte_swx_pipeline.c
@@ -11101,6 +11101,220 @@ rte_swx_ctl_pipeline_mirroring_session_set(struct rte_swx_pipeline *p,
return 0;
}
+static int
+rte_swx_ctl_pipeline_table_lookup(struct rte_swx_pipeline *p,
+ const char *table_name,
+ uint8_t *key,
+ uint64_t *action_id,
+ uint8_t **action_data,
+ size_t *entry_id,
+ int *hit)
+{
+ struct table *t;
+ void *mailbox = NULL;
+
+ /* Check input arguments. */
+ if (!p ||
+ !p->build_done ||
+ !table_name ||
+ !table_name[0] ||
+ !key ||
+ !entry_id ||
+ !hit)
+ return -EINVAL;
+
+ /* Find the table. */
+ t = table_find(p, table_name);
+ if (!t)
+ return -EINVAL;
+
+ if (!t->type) {
+ *hit = 0;
+ return 0;
+ }
+
+ /* Setup mailbox. */
+ if (t->type->ops.mailbox_size_get) {
+ uint64_t mailbox_size;
+
+ mailbox_size = t->type->ops.mailbox_size_get();
+ if (mailbox_size) {
+ mailbox = calloc(1, mailbox_size);
+ if (!mailbox)
+ return -ENOMEM;
+ }
+ }
+
+ /* Table lookup operation. */
+ for ( ; ; ) {
+ struct rte_swx_table_state *ts = &p->table_state[t->id];
+ int done;
+
+ done = t->type->ops.lkp(ts->obj,
+ mailbox,
+ &key,
+ action_id,
+ action_data,
+ entry_id,
+ hit);
+ if (done)
+ break;
+ }
+
+ /* Free mailbox. */
+ free(mailbox);
+
+ return 0;
+}
+
+static int
+rte_swx_ctl_pipeline_learner_lookup(struct rte_swx_pipeline *p,
+ const char *learner_name,
+ uint8_t *key,
+ uint64_t *action_id,
+ uint8_t **action_data,
+ size_t *entry_id,
+ int *hit)
+{
+ struct learner *l;
+ void *mailbox = NULL;
+ uint64_t mailbox_size, time;
+
+ /* Check input arguments. */
+ if (!p ||
+ !p->build_done ||
+ !learner_name ||
+ !learner_name[0] ||
+ !key ||
+ !entry_id ||
+ !hit)
+ return -EINVAL;
+
+ /* Find the learner table. */
+ l = learner_find(p, learner_name);
+ if (!l)
+ return -EINVAL;
+
+ /* Setup mailbox. */
+ mailbox_size = rte_swx_table_learner_mailbox_size_get();
+ if (mailbox_size) {
+ mailbox = calloc(1, mailbox_size);
+ if (!mailbox)
+ return -ENOMEM;
+ }
+
+ /* Learner table lookup operation. */
+ time = rte_get_tsc_cycles();
+ for ( ; ; ) {
+ uint32_t pos = p->n_tables + p->n_selectors + l->id;
+ struct rte_swx_table_state *ts = &p->table_state[pos];
+ int done;
+
+ done = rte_swx_table_learner_lookup(ts->obj,
+ mailbox,
+ time,
+ &key,
+ action_id,
+ action_data,
+ entry_id,
+ hit);
+ if (done)
+ break;
+ }
+
+ /* Free mailbox. */
+ free(mailbox);
+
+ return 0;
+}
+
+static int
+rte_swx_ctl_pipeline_table_entry_id_get(struct rte_swx_pipeline *p,
+ const char *table_name,
+ uint8_t *table_key,
+ size_t *table_entry_id)
+{
+ struct table *t;
+ struct learner *l;
+ uint64_t action_id;
+ uint8_t *action_data;
+ size_t entry_id = 0;
+ int hit = 0, status;
+
+ /* Check input arguments. */
+ if (!p ||
+ !p->build_done ||
+ !table_name ||
+ !table_name[0] ||
+ !table_key ||
+ !table_entry_id)
+ return -EINVAL;
+
+ t = table_find(p, table_name);
+ l = learner_find(p, table_name);
+ if (!t && !l)
+ return -EINVAL;
+
+ /* Table lookup operation. */
+ if (t)
+ status = rte_swx_ctl_pipeline_table_lookup(p,
+ table_name,
+ table_key,
+ &action_id,
+ &action_data,
+ &entry_id,
+ &hit);
+ else
+ status = rte_swx_ctl_pipeline_learner_lookup(p,
+ table_name,
+ table_key,
+ &action_id,
+ &action_data,
+ &entry_id,
+ &hit);
+ if (status)
+ return status;
+
+ /* Reserve entry ID 0 for the table default entry. */
+ *table_entry_id = hit ? (1 + entry_id) : 0;
+
+ return 0;
+}
+
+int
+rte_swx_ctl_pipeline_regarray_read_with_key(struct rte_swx_pipeline *p,
+ const char *regarray_name,
+ const char *table_name,
+ uint8_t *table_key,
+ uint64_t *value)
+{
+ size_t entry_id = 0;
+ int status;
+
+ status = rte_swx_ctl_pipeline_table_entry_id_get(p, table_name, table_key, &entry_id);
+ if (status)
+ return status;
+
+ return rte_swx_ctl_pipeline_regarray_read(p, regarray_name, entry_id, value);
+}
+
+int
+rte_swx_ctl_pipeline_regarray_write_with_key(struct rte_swx_pipeline *p,
+ const char *regarray_name,
+ const char *table_name,
+ uint8_t *table_key,
+ uint64_t value)
+{
+ size_t entry_id = 0;
+ int status;
+
+ status = rte_swx_ctl_pipeline_table_entry_id_get(p, table_name, table_key, &entry_id);
+ if (status)
+ return status;
+
+ return rte_swx_ctl_pipeline_regarray_write(p, regarray_name, entry_id, value);
+}
+
/*
* Pipeline compilation.
*/
diff --git a/lib/pipeline/version.map b/lib/pipeline/version.map
index 16806e6802..8ed92042d6 100644
--- a/lib/pipeline/version.map
+++ b/lib/pipeline/version.map
@@ -147,6 +147,8 @@ EXPERIMENTAL {
#added in 22.11
rte_swx_ctl_pipeline_find;
+ rte_swx_ctl_pipeline_regarray_read_with_key;
+ rte_swx_ctl_pipeline_regarray_write_with_key;
rte_swx_pipeline_build_from_lib;
rte_swx_pipeline_codegen;
rte_swx_pipeline_find;
--
2.34.1
next prev parent reply other threads:[~2022-08-26 10:36 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-26 10:35 [PATCH 0/7] pipeline: support direct registers and meters Cristian Dumitrescu
2022-08-26 10:35 ` [PATCH 1/7] table: add entry ID for regular tables Cristian Dumitrescu
2022-08-26 10:36 ` [PATCH 2/7] table: add entry ID for learner tables Cristian Dumitrescu
2022-08-26 10:36 ` [PATCH 3/7] pipeline: add table entry ID read instruction Cristian Dumitrescu
2022-08-26 10:36 ` Cristian Dumitrescu [this message]
2022-08-26 10:36 ` [PATCH 5/7] pipeline: support direct meters on the control path Cristian Dumitrescu
2022-08-26 10:36 ` [PATCH 6/7] examples/pipeline: add CLI commands for direct registers Cristian Dumitrescu
2022-08-26 10:36 ` [PATCH 7/7] examples/pipeline: add CLI commands for direct meters Cristian Dumitrescu
2022-08-26 11:21 ` [PATCH V2 0/7] pipeline: support direct registers and meters Cristian Dumitrescu
2022-08-26 11:21 ` [PATCH V2 1/7] table: add entry ID for regular tables Cristian Dumitrescu
2022-08-26 11:21 ` [PATCH V2 2/7] table: add entry ID for learner tables Cristian Dumitrescu
2022-08-26 11:21 ` [PATCH V2 3/7] pipeline: add table entry ID read instruction Cristian Dumitrescu
2022-08-26 11:21 ` [PATCH V2 4/7] pipeline: support direct registers on the control path Cristian Dumitrescu
2022-08-26 11:21 ` [PATCH V2 5/7] pipeline: support direct meters " Cristian Dumitrescu
2022-08-26 11:21 ` [PATCH V2 6/7] examples/pipeline: add CLI commands for direct registers Cristian Dumitrescu
2022-08-26 11:21 ` [PATCH V2 7/7] examples/pipeline: add CLI commands for direct meters Cristian Dumitrescu
2022-08-30 18:58 ` [PATCH V3 0/7] pipeline: support direct registers and meters Cristian Dumitrescu
2022-08-30 18:58 ` [PATCH V3 1/7] table: add entry ID for regular tables Cristian Dumitrescu
2022-08-30 18:58 ` [PATCH V3 2/7] table: add entry ID for learner tables Cristian Dumitrescu
2022-09-24 8:25 ` Thomas Monjalon
2022-09-26 9:19 ` Dumitrescu, Cristian
2022-09-26 13:45 ` Thomas Monjalon
2022-08-30 18:58 ` [PATCH V3 3/7] pipeline: add table entry ID read instruction Cristian Dumitrescu
2022-08-30 18:58 ` [PATCH V3 4/7] pipeline: support direct registers on the control path Cristian Dumitrescu
2022-08-30 18:58 ` [PATCH V3 5/7] pipeline: support direct meters " Cristian Dumitrescu
2022-08-30 18:58 ` [PATCH V3 6/7] examples/pipeline: add CLI commands for direct registers Cristian Dumitrescu
2022-08-30 18:58 ` [PATCH V3 7/7] examples/pipeline: add CLI commands for direct meters Cristian Dumitrescu
2022-09-24 9:34 ` [PATCH V3 0/7] pipeline: support direct registers and meters Thomas Monjalon
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