From: Kai Ji <kai.ji@intel.com>
To: dev@dpdk.org
Cc: Kai Ji <kai.ji@intel.com>
Subject: [dpdk-dev v2] lib/cryptodev: multi-process IPC request handler
Date: Sun, 2 Oct 2022 09:43:33 +0800 [thread overview]
Message-ID: <20221002014333.41385-1-kai.ji@intel.com> (raw)
In-Reply-To: <20220726230804.90036-1-kai.ji@intel.com>
This patch add a function to support queue-pair configuration
request to allow the primary or secondary process to setup/free the
queue-pair via IPC handler.
Signed-off-by: Kai Ji <kai.ji@intel.com>
---
lib/cryptodev/cryptodev_pmd.h | 3 +-
lib/cryptodev/rte_cryptodev.c | 89 +++++++++++++++++++++++++++++++++++
lib/cryptodev/rte_cryptodev.h | 37 +++++++++++++++
lib/cryptodev/version.map | 4 ++
4 files changed, 132 insertions(+), 1 deletion(-)
diff --git a/lib/cryptodev/cryptodev_pmd.h b/lib/cryptodev/cryptodev_pmd.h
index 96d7e225b0..2433c4d109 100644
--- a/lib/cryptodev/cryptodev_pmd.h
+++ b/lib/cryptodev/cryptodev_pmd.h
@@ -78,7 +78,8 @@ struct rte_cryptodev_data {
void **queue_pairs;
/** Number of device queue pairs. */
uint16_t nb_queue_pairs;
-
+ /** Array of process id used for queue pairs **/
+ uint16_t *qp_in_use_by_pid;
/** PMD-specific private data */
void *dev_private;
} __rte_cache_aligned;
diff --git a/lib/cryptodev/rte_cryptodev.c b/lib/cryptodev/rte_cryptodev.c
index 5e25e607fa..2c6e9dd67b 100644
--- a/lib/cryptodev/rte_cryptodev.c
+++ b/lib/cryptodev/rte_cryptodev.c
@@ -49,6 +49,9 @@ struct rte_crypto_fp_ops rte_crypto_fp_ops[RTE_CRYPTO_MAX_DEVS];
/* spinlock for crypto device callbacks */
static rte_spinlock_t rte_cryptodev_cb_lock = RTE_SPINLOCK_INITIALIZER;
+/* crypto queue pair config */
+#define CRYPTODEV_MP_REQ "cryptodev_mp_request"
+
/**
* The user application callback description.
*
@@ -1029,6 +1032,21 @@ rte_cryptodev_queue_pairs_config(struct rte_cryptodev *dev, uint16_t nb_qpairs,
}
dev->data->nb_queue_pairs = nb_qpairs;
+
+ if (dev->data->qp_in_use_by_pid == NULL) {
+ dev->data->qp_in_use_by_pid = rte_zmalloc_socket(
+ "cryptodev->qp_in_use_by_pid",
+ sizeof(dev->data->qp_in_use_by_pid[0]) *
+ dev_info.max_nb_queue_pairs,
+ RTE_CACHE_LINE_SIZE, socket_id);
+ if (dev->data->qp_in_use_by_pid == NULL) {
+ CDEV_LOG_ERR("failed to get memory for qp meta data, "
+ "nb_queues %u",
+ nb_qpairs);
+ return -(ENOMEM);
+ }
+ }
+
return 0;
}
@@ -1284,6 +1302,77 @@ rte_cryptodev_queue_pair_setup(uint8_t dev_id, uint16_t queue_pair_id,
socket_id);
}
+static int
+rte_cryptodev_ipc_request(const struct rte_mp_msg *mp_msg, const void *peer)
+{
+ struct rte_mp_msg mp_res;
+ struct rte_cryptodev_mp_param *res =
+ (struct rte_cryptodev_mp_param *)mp_res.param;
+ const struct rte_cryptodev_mp_param *param =
+ (const struct rte_cryptodev_mp_param *)mp_msg->param;
+
+ int ret;
+ struct rte_cryptodev *dev;
+ uint16_t *qps_in_used_by_pid;
+ int dev_id = param->dev_id;
+ int qp_id = param->qp_id;
+ struct rte_cryptodev_qp_conf *queue_conf = param->queue_conf;
+
+ res->result = -EINVAL;
+ if (!rte_cryptodev_is_valid_dev(dev_id)) {
+ CDEV_LOG_ERR("Invalid dev_id=%" PRIu8, dev_id);
+ goto out;
+ }
+
+ if (!rte_cryptodev_get_qp_status(dev_id, qp_id))
+ goto out;
+
+ dev = &rte_crypto_devices[dev_id];
+ qps_in_used_by_pid = dev->data->qp_in_use_by_pid;
+
+ switch (param->type) {
+ case RTE_CRYPTODEV_MP_REQ_QP_SET:
+ ret = rte_cryptodev_queue_pair_setup(dev_id, qp_id,
+ queue_conf, param->socket_id);
+ if (!ret)
+ qps_in_used_by_pid[qp_id] = param->process_id;
+ res->result = ret;
+ break;
+ case RTE_CRYPTODEV_MP_REQ_QP_FREE:
+ if ((rte_eal_process_type() == RTE_PROC_SECONDARY) &&
+ (qps_in_used_by_pid[qp_id] != param->process_id)) {
+ CDEV_LOG_ERR("Unable to release qp_id=%" PRIu8, qp_id);
+ goto out;
+ }
+
+ ret = (*dev->dev_ops->queue_pair_release)(dev, qp_id);
+ if (!ret)
+ qps_in_used_by_pid[qp_id] = 0;
+
+ res->result = ret;
+ break;
+ default:
+ CDEV_LOG_ERR("invalid mp request type\n");
+ }
+
+out:
+ ret = rte_mp_reply(&mp_res, peer);
+ return ret;
+}
+
+int rte_cryptodev_mp_request_register(void)
+{
+ RTE_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
+ return rte_mp_action_register(CRYPTODEV_MP_REQ,
+ rte_cryptodev_ipc_request);
+}
+
+void rte_cryptodev_mp_request_unregister(void)
+{
+ RTE_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
+ rte_mp_action_unregister(CRYPTODEV_MP_REQ);
+}
+
struct rte_cryptodev_cb *
rte_cryptodev_add_enq_callback(uint8_t dev_id,
uint16_t qp_id,
diff --git a/lib/cryptodev/rte_cryptodev.h b/lib/cryptodev/rte_cryptodev.h
index 56f459c6a0..d8cadebd0c 100644
--- a/lib/cryptodev/rte_cryptodev.h
+++ b/lib/cryptodev/rte_cryptodev.h
@@ -539,6 +539,24 @@ enum rte_cryptodev_event_type {
RTE_CRYPTODEV_EVENT_MAX /**< max value of this enum */
};
+/* Request types for IPC. */
+enum rte_cryptodev_mp_req_type {
+ RTE_CRYPTODEV_MP_REQ_NONE,
+ RTE_CRYPTODEV_MP_REQ_QP_SET,
+ RTE_CRYPTODEV_MP_REQ_QP_FREE
+};
+
+/* Parameters for IPC. */
+struct rte_cryptodev_mp_param {
+ enum rte_cryptodev_mp_req_type type;
+ int dev_id;
+ int qp_id;
+ int socket_id;
+ uint16_t process_id;
+ struct rte_cryptodev_qp_conf *queue_conf;
+ int result;
+};
+
/** Crypto device queue pair configuration structure. */
struct rte_cryptodev_qp_conf {
uint32_t nb_descriptors; /**< Number of descriptors per queue pair */
@@ -769,6 +787,25 @@ extern int
rte_cryptodev_queue_pair_setup(uint8_t dev_id, uint16_t queue_pair_id,
const struct rte_cryptodev_qp_conf *qp_conf, int socket_id);
+/**
+ * Register multi process request IPC handler
+ *
+ * @return
+ * - 0: Success registered
+ * - 1: Failed registration failed
+ * - -EINVAL: device was not configured
+ */
+__rte_experimental
+int
+rte_cryptodev_mp_request_register(void);
+
+/**
+ * Unregister multi process unrequest IPC handler
+ */
+__rte_experimental
+void
+rte_cryptodev_mp_request_unregister(void);
+
/**
* Get the status of queue pairs setup on a specific crypto device
*
diff --git a/lib/cryptodev/version.map b/lib/cryptodev/version.map
index 5aee87c6f7..ea62981f73 100644
--- a/lib/cryptodev/version.map
+++ b/lib/cryptodev/version.map
@@ -109,6 +109,10 @@ EXPERIMENTAL {
#added in 22.07
rte_cryptodev_session_event_mdata_set;
rte_crypto_asym_ke_strings;
+
+ #added in 22.11
+ rte_cryptodev_mp_request_register;
+ rte_cryptodev_mp_request_unregister;
};
INTERNAL {
--
2.17.1
next prev parent reply other threads:[~2022-10-02 1:43 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-26 23:08 [dpdk-dev v1] " Kai Ji
2022-07-27 4:25 ` [EXT] " Akhil Goyal
2022-08-05 8:51 ` Zhang, Roy Fan
2022-08-08 7:43 ` Akhil Goyal
2022-08-12 8:06 ` Zhang, Roy Fan
2022-08-12 8:25 ` Akhil Goyal
2022-09-21 18:37 ` Akhil Goyal
2022-10-02 1:43 ` Kai Ji [this message]
2022-10-02 18:57 ` [EXT] [dpdk-dev v2] " Akhil Goyal
2022-10-02 22:44 ` [dpdk-dev v3 1/1] " Kai Ji
2022-10-03 16:39 ` Power, Ciara
2022-10-04 18:12 ` [EXT] " Akhil Goyal
2022-10-06 0:57 ` Ji, Kai
2022-10-06 8:16 ` [dpdk-dev v4] " Kai Ji
2022-10-06 16:19 ` Power, Ciara
2022-10-06 17:06 ` [dpdk-dev v5] " Kai Ji
2022-10-06 18:49 ` [EXT] " Akhil Goyal
2022-10-06 23:11 ` Ji, Kai
2022-10-07 9:37 ` Zhang, Fan
2022-10-06 22:41 ` Konstantin Ananyev
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