From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
Pavan Nikhilesh <pbhagavatula@marvell.com>,
"Shijith Thotton" <sthotton@marvell.com>
Cc: <jerinj@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 04/13] net/cnxk: add use nixtx offset for cn10kb
Date: Tue, 11 Oct 2022 17:31:26 +0530 [thread overview]
Message-ID: <20221011120135.45846-4-ndabilpuram@marvell.com> (raw)
In-Reply-To: <20221011120135.45846-1-ndabilpuram@marvell.com>
In outbound inline case, use NIX Tx offset instead of
NIX Tx address for CN103XX as per new instruction format.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/common/cnxk/roc_constants.h | 1 +
drivers/event/cnxk/cn10k_worker.h | 3 +++
drivers/net/cnxk/cn10k_ethdev.c | 6 ++++++
drivers/net/cnxk/cn10k_ethdev.h | 3 ++-
drivers/net/cnxk/cn10k_ethdev_sec.c | 2 ++
drivers/net/cnxk/cn10k_tx.h | 4 ++--
6 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/common/cnxk/roc_constants.h b/drivers/common/cnxk/roc_constants.h
index c693dde62e..0495965daa 100644
--- a/drivers/common/cnxk/roc_constants.h
+++ b/drivers/common/cnxk/roc_constants.h
@@ -12,6 +12,7 @@
/* [CN10K, .) */
#define ROC_LMT_LINE_SZ 128
#define ROC_NUM_LMT_LINES 2048
+#define ROC_LMT_LINES_PER_STR_LOG2 4
#define ROC_LMT_LINES_PER_CORE_LOG2 5
#define ROC_LMT_LINE_SIZE_LOG2 7
#define ROC_LMT_BASE_PER_CORE_LOG2 \
diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h
index 7a82dd352a..75a2ff244a 100644
--- a/drivers/event/cnxk/cn10k_worker.h
+++ b/drivers/event/cnxk/cn10k_worker.h
@@ -595,6 +595,9 @@ cn10k_sso_tx_one(struct cn10k_sso_hws *ws, struct rte_mbuf *m, uint64_t *cmd,
ws->gw_rdata = roc_sso_hws_head_wait(ws->base);
cn10k_sso_txq_fc_wait(txq);
+ if (flags & NIX_TX_OFFLOAD_SECURITY_F && sec)
+ cn10k_nix_sec_fc_wait_one(txq);
+
roc_lmt_submit_steorl(lmt_id, pa);
if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) {
diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c
index e8faeebe1f..cf1d9b164d 100644
--- a/drivers/net/cnxk/cn10k_ethdev.c
+++ b/drivers/net/cnxk/cn10k_ethdev.c
@@ -538,6 +538,9 @@ cn10k_nix_reassembly_capability_get(struct rte_eth_dev *eth_dev,
int rc = -ENOTSUP;
RTE_SET_USED(eth_dev);
+ if (!roc_nix_has_reass_support(&dev->nix))
+ return -ENOTSUP;
+
if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) {
reassembly_capa->timeout_ms = 60 * 1000;
reassembly_capa->max_frags = 4;
@@ -565,6 +568,9 @@ cn10k_nix_reassembly_conf_set(struct rte_eth_dev *eth_dev,
struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
int rc = 0;
+ if (!roc_nix_has_reass_support(&dev->nix))
+ return -ENOTSUP;
+
if (!conf->flags) {
/* Clear offload flags on disable */
dev->rx_offload_flags &= ~NIX_RX_REAS_F;
diff --git a/drivers/net/cnxk/cn10k_ethdev.h b/drivers/net/cnxk/cn10k_ethdev.h
index d0a5b136e3..948c8348ad 100644
--- a/drivers/net/cnxk/cn10k_ethdev.h
+++ b/drivers/net/cnxk/cn10k_ethdev.h
@@ -75,7 +75,8 @@ struct cn10k_sec_sess_priv {
uint16_t partial_len : 10;
uint16_t chksum : 2;
uint16_t dec_ttl : 1;
- uint16_t rsvd : 3;
+ uint16_t nixtx_off : 1;
+ uint16_t rsvd : 2;
};
uint64_t u64;
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c
index 6de4a284da..3ca707f038 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -798,6 +798,8 @@ cn10k_eth_sec_session_create(void *device,
sess_priv.chksum = (!ipsec->options.ip_csum_enable << 1 |
!ipsec->options.l4_csum_enable);
sess_priv.dec_ttl = ipsec->options.dec_ttl;
+ if (roc_model_is_cn10kb_a0())
+ sess_priv.nixtx_off = 1;
/* Pointer from eth_sec -> outb_sa */
eth_sec->sa = outb_sa;
diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h
index 492942de15..527b65022f 100644
--- a/drivers/net/cnxk/cn10k_tx.h
+++ b/drivers/net/cnxk/cn10k_tx.h
@@ -397,7 +397,7 @@ cn10k_nix_prep_sec_vec(struct rte_mbuf *m, uint64x2_t *cmd0, uint64x2_t *cmd1,
/* DLEN passed is excluding L2 HDR */
pkt_len -= l2_len;
}
- w0 |= nixtx;
+ w0 |= sess_priv.nixtx_off ? ((((int64_t)nixtx - (int64_t)dptr) & 0xFFFFF) << 32) : nixtx;
/* CPT word 0 and 1 */
cmd01 = vdupq_n_u64(0);
cmd01 = vsetq_lane_u64(w0, cmd01, 0);
@@ -539,7 +539,7 @@ cn10k_nix_prep_sec(struct rte_mbuf *m, uint64_t *cmd, uintptr_t *nixtx_addr,
sg->seg1_size = pkt_len + dlen_adj;
pkt_len -= l2_len;
}
- w0 |= nixtx;
+ w0 |= sess_priv.nixtx_off ? ((((int64_t)nixtx - (int64_t)dptr) & 0xFFFFF) << 32) : nixtx;
/* CPT word 0 and 1 */
cmd01 = vdupq_n_u64(0);
cmd01 = vsetq_lane_u64(w0, cmd01, 0);
--
2.25.1
next prev parent reply other threads:[~2022-10-11 12:02 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-11 12:01 [PATCH 01/13] common/cnxk: set MTU size on SDP based on SoC type Nithin Dabilpuram
2022-10-11 12:01 ` [PATCH 02/13] common/cnxk: add devargs for soft expiry poll frequency Nithin Dabilpuram
2022-10-11 12:01 ` [PATCH 03/13] net/cnxk: fix later skip to include mbuf priv Nithin Dabilpuram
2022-10-11 12:01 ` Nithin Dabilpuram [this message]
2022-10-11 12:01 ` [PATCH 05/13] common/cnxk: fix RQ mask config for cn10kb chip Nithin Dabilpuram
2022-10-11 12:01 ` [PATCH 06/13] common/cnxk: fix schedule weight update Nithin Dabilpuram
2022-10-11 12:01 ` [PATCH 07/13] common/cnxk: sync NIX HW info mbox structure with kernel Nithin Dabilpuram
2022-10-11 12:01 ` [PATCH 08/13] common/cnxk: revert VF root weight Nithin Dabilpuram
2022-10-11 12:01 ` [PATCH 09/13] common/cnxk: set hysteresis bit to one Nithin Dabilpuram
2022-10-11 12:01 ` [PATCH 10/13] net/cnxk: handle SA soft packet and byte expiry events Nithin Dabilpuram
2022-10-11 12:01 ` [PATCH 11/13] common/cnxk: sync mailbox for channel and bpid map Nithin Dabilpuram
2022-10-11 12:01 ` [PATCH 12/13] net/cnxk: remove unnecessary dptr update Nithin Dabilpuram
2022-10-11 12:01 ` [PATCH 13/13] net/cnxk: remove duplicate mempool debug checks Nithin Dabilpuram
2022-10-12 6:53 ` Jerin Jacob
2022-10-13 11:41 ` [PATCH v2 01/13] common/cnxk: set MTU size on SDP based on SoC type Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 02/13] common/cnxk: add devargs for soft expiry poll frequency Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 03/13] net/cnxk: fix later skip to include mbuf priv Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 04/13] net/cnxk: use NIX Tx offset for cn10kb Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 05/13] common/cnxk: fix RQ mask config for cn10kb chip Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 06/13] common/cnxk: fix schedule weight update Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 07/13] common/cnxk: sync NIX HW info mbox structure with kernel Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 08/13] common/cnxk: set hysteresis bit to one Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 09/13] net/cnxk: handle SA soft packet and byte expiry events Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 10/13] common/cnxk: sync mailbox for channel and bpid map Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 11/13] net/cnxk: remove unnecessary dptr update Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 12/13] net/cnxk: remove duplicate mempool debug checks Nithin Dabilpuram
2022-10-13 11:41 ` [PATCH v2 13/13] net/cnxk: handle hard expiry events Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 01/13] common/cnxk: set MTU size on SDP based on SoC type Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 02/13] common/cnxk: add devargs for soft expiry poll frequency Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 03/13] net/cnxk: fix later skip to include mbuf priv Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 04/13] net/cnxk: use NIX Tx offset for cn10kb Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 05/13] common/cnxk: fix RQ mask config for cn10kb chip Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 06/13] common/cnxk: fix schedule weight update Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 07/13] common/cnxk: sync NIX HW info mbox structure with kernel Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 08/13] common/cnxk: set hysteresis bit to one Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 09/13] net/cnxk: handle SA soft packet and byte expiry events Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 10/13] common/cnxk: sync mailbox for channel and bpid map Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 11/13] net/cnxk: remove unnecessary dptr update Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 12/13] net/cnxk: remove duplicate mempool debug checks Nithin Dabilpuram
2022-10-14 5:43 ` [PATCH v3 13/13] net/cnxk: handle hard expiry events Nithin Dabilpuram
2022-10-18 11:04 ` Jerin Jacob
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221011120135.45846-4-ndabilpuram@marvell.com \
--to=ndabilpuram@marvell.com \
--cc=dev@dpdk.org \
--cc=jerinj@marvell.com \
--cc=kirankumark@marvell.com \
--cc=pbhagavatula@marvell.com \
--cc=skori@marvell.com \
--cc=skoteshwar@marvell.com \
--cc=sthotton@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).