From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 14428A00C2; Fri, 14 Oct 2022 07:44:34 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5A89942C57; Fri, 14 Oct 2022 07:43:55 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 5E28542C5C for ; Fri, 14 Oct 2022 07:43:54 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29DJMNMh010235 for ; Thu, 13 Oct 2022 22:43:53 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=rS1WBoQh4isp7oDK3l/h2z+KgJed4miJKo6O5H3o9K4=; b=XbpF2xLXFaHRoRYrK01a3Pbwl/rvRrSWDU7luULyzJgPAvp3g/OV+n0NNV6U1sFp/ws2 jzrXF9qb2x75ejUpl40HoSVx+3Vj0f9iOV4//UjQnQXnzYUk/5TBrCaeoz7cJ1B8SEhp mUL8pS3Wju07zu7oI2/rOX+XAD1H3Pf6ta10yCdL3JluPHR+evAJ7AsZVm+hkwj9YNmX FhrRKPU3t1+hrkwEonrtl23nkv99XoLIXK3qMyBrqcRCyshDEJA4t7S8mGw/RsQfYRmL FXSb4I0r3FS4y6ePw4iea3+2fkbXtQlZno6re0WTVDJYMAzYifpFq+m2+3qS+4gEESQl MQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3k6fwvcbgm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 13 Oct 2022 22:43:53 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 13 Oct 2022 22:43:51 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 13 Oct 2022 22:43:51 -0700 Received: from localhost.localdomain (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 855483F7048; Thu, 13 Oct 2022 22:43:49 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH v3 12/13] net/cnxk: remove duplicate mempool debug checks Date: Fri, 14 Oct 2022 11:13:16 +0530 Message-ID: <20221014054317.1151306-12-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221014054317.1151306-1-ndabilpuram@marvell.com> References: <20221011120135.45846-1-ndabilpuram@marvell.com> <20221014054317.1151306-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: dRD9ICuxjJR3f8E3ikcTWi9pMzV0p92U X-Proofpoint-ORIG-GUID: dRD9ICuxjJR3f8E3ikcTWi9pMzV0p92U X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-14_01,2022-10-13_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Remove duplicate mempool debug checks for mbufs received. Fixes: 592642c494b1 ("net/cnxk: align prefetches to CN10K cache model") Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cn10k_rx.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h index cf390a0361..4e22ceda02 100644 --- a/drivers/net/cnxk/cn10k_rx.h +++ b/drivers/net/cnxk/cn10k_rx.h @@ -1307,12 +1307,6 @@ cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts, ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1); } - /* Mark mempool obj as "get" as it is alloc'ed by NIX */ - RTE_MEMPOOL_CHECK_COOKIES(mbuf0->pool, (void **)&mbuf0, 1, 1); - RTE_MEMPOOL_CHECK_COOKIES(mbuf1->pool, (void **)&mbuf1, 1, 1); - RTE_MEMPOOL_CHECK_COOKIES(mbuf2->pool, (void **)&mbuf2, 1, 1); - RTE_MEMPOOL_CHECK_COOKIES(mbuf3->pool, (void **)&mbuf3, 1, 1); - /* Translate meta to mbuf */ if (flags & NIX_RX_OFFLOAD_SECURITY_F) { uint64_t cq0_w5 = *CQE_PTR_OFF(cq0, 0, 40, flags); -- 2.25.1