From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E8BF8A0556; Mon, 17 Oct 2022 11:19:36 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DF6454021D; Mon, 17 Oct 2022 11:19:36 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id E578840143 for ; Mon, 17 Oct 2022 11:19:34 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1665998375; x=1697534375; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6vOwju/shfkGTz7RsMTLTlzhdf8YAW9CeTfeKozQ0yU=; b=cT7g14hVYaBRtGCdHVZiHWI3QAWrM92Fh/3TUmZU6zDDQTWCpkiyn6d1 dz1u3WUs32wdtJf148opwbOUrqRARCVp9XSMHdaggstjqlUUvABBFZ8aP QkTTRClwVFq8DuVcw4F4ZO+C5rqzG8Kef1DoArbmoJNWTkV6UAwv1q7Ig kgdm+fKBH21Kr66KbQl9D2OzbI30Y+nLz9wIZrf6a/Fm89oQsi2IhDE/M CIRYdrS/vVM/mJFCdGjCSrfc3fK5DueReJVkNc48pa7gRfvM8LJSHZGiU aeXYQTMgISpRbsspnzOFyhbStO+FoXRcwM2IekYUr/JipYFQU1ap+10lr A==; X-IronPort-AV: E=McAfee;i="6500,9779,10502"; a="306828979" X-IronPort-AV: E=Sophos;i="5.95,191,1661842800"; d="scan'208";a="306828979" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2022 02:19:30 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10502"; a="753569156" X-IronPort-AV: E=Sophos;i="5.95,191,1661842800"; d="scan'208";a="753569156" Received: from unknown (HELO localhost.localdomain) ([10.239.252.55]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2022 02:19:26 -0700 From: Yuan Wang To: Qiming Yang , Qi Zhang Cc: dev@dpdk.org, xuan.ding@intel.com, yaqi.tang@intel.com, Yuan Wang Subject: [PATCH v2] net/ice: fix the judgment order of buffer split Date: Tue, 18 Oct 2022 01:04:59 +0800 Message-Id: <20221017170459.775039-1-yuanx.wang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221017160021.773879-1-yuanx.wang@intel.com> References: <20221017160021.773879-1-yuanx.wang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org proto_hdr defines a bit mask of the protocol sequence as RTE_PTYPE_*, The last RTE_PTYPE* in the mask indicates the split position. To get the split position from proto_hdr, the order of judgement should be from inner to outer layer, so for tunneling packets the tunnel header should be placed at the end of the judgement condition. Fixes: 629dad3ef325 ("net/ice: support buffer split in scalar Rx") Signed-off-by: Yuan Wang --- v2: fix typo --- drivers/net/ice/ice_rxtx.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c index 953ff217df..7a2d5829c0 100644 --- a/drivers/net/ice/ice_rxtx.c +++ b/drivers/net/ice/ice_rxtx.c @@ -324,13 +324,6 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq) goto set_hsplit_finish; } - switch (proto_hdr & RTE_PTYPE_TUNNEL_MASK) { - case RTE_PTYPE_TUNNEL_GRENAT: - rx_ctx.dtype = ICE_RX_DTYPE_HEADER_SPLIT; - rx_ctx.hsplit_1 = ICE_RLAN_RX_HSPLIT_1_SPLIT_ALWAYS; - goto set_hsplit_finish; - } - switch (proto_hdr & RTE_PTYPE_INNER_L4_MASK) { case RTE_PTYPE_INNER_L4_TCP: case RTE_PTYPE_INNER_L4_UDP: @@ -358,6 +351,13 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq) goto set_hsplit_finish; } + switch (proto_hdr & RTE_PTYPE_TUNNEL_MASK) { + case RTE_PTYPE_TUNNEL_GRENAT: + rx_ctx.dtype = ICE_RX_DTYPE_HEADER_SPLIT; + rx_ctx.hsplit_1 = ICE_RLAN_RX_HSPLIT_1_SPLIT_ALWAYS; + goto set_hsplit_finish; + } + PMD_DRV_LOG(ERR, "Buffer split protocol is not supported"); return -EINVAL; -- 2.25.1