From: Hernan Vargas <hernan.vargas@intel.com>
To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,
maxime.coquelin@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com,
Hernan Vargas <hernan.vargas@intel.com>
Subject: [PATCH v4 17/30] baseband/acc100: add HARQ index helper function
Date: Tue, 18 Oct 2022 17:39:05 -0700 [thread overview]
Message-ID: <20221019003918.257506-18-hernan.vargas@intel.com> (raw)
In-Reply-To: <20221019003918.257506-1-hernan.vargas@intel.com>
Refactor code to use the HARQ index helper function and make harq_idx
uint32.
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc/rte_acc100_pmd.c | 36 +++++++++++++--------------
1 file changed, 17 insertions(+), 19 deletions(-)
diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index 0921e9a44d..d0c98ced32 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -1050,7 +1050,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
union acc_harq_layout_data *harq_layout)
{
uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset;
- uint16_t harq_index;
+ uint32_t harq_index;
uint32_t l;
bool harq_prun = false;
uint32_t max_hc_in;
@@ -1098,8 +1098,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION);
fcw->llr_pack_mode = check_bit(op->ldpc_dec.op_flags,
RTE_BBDEV_LDPC_LLR_COMPRESSION);
- harq_index = op->ldpc_dec.harq_combined_output.offset /
- ACC_HARQ_OFFSET;
+ harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
#ifdef ACC100_EXT_MEM
/* Limit cases when HARQ pruning is valid */
harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
@@ -1777,20 +1776,17 @@ acc100_dma_desc_ld_update(struct rte_bbdev_dec_op *op,
*h_out_length = desc->data_ptrs[next_triplet].blen;
next_triplet++;
- if (check_bit(op->ldpc_dec.op_flags,
- RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE)) {
- desc->data_ptrs[next_triplet].address =
- op->ldpc_dec.harq_combined_output.offset;
+ if (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE)) {
+ struct rte_bbdev_dec_op *prev_op;
+ uint32_t harq_idx, prev_harq_idx;
+ desc->data_ptrs[next_triplet].address = op->ldpc_dec.harq_combined_output.offset;
/* Adjust based on previous operation */
- struct rte_bbdev_dec_op *prev_op = desc->op_addr;
+ prev_op = desc->op_addr;
op->ldpc_dec.harq_combined_output.length =
prev_op->ldpc_dec.harq_combined_output.length;
- int16_t hq_idx = op->ldpc_dec.harq_combined_output.offset /
- ACC_HARQ_OFFSET;
- int16_t prev_hq_idx =
- prev_op->ldpc_dec.harq_combined_output.offset
- / ACC_HARQ_OFFSET;
- harq_layout[hq_idx].val = harq_layout[prev_hq_idx].val;
+ harq_idx = hq_index(op->ldpc_dec.harq_combined_output.offset);
+ prev_harq_idx = hq_index(prev_op->ldpc_dec.harq_combined_output.offset);
+ harq_layout[harq_idx].val = harq_layout[prev_harq_idx].val;
#ifndef ACC100_EXT_MEM
struct rte_bbdev_op_data ho =
op->ldpc_dec.harq_combined_output;
@@ -2534,6 +2530,9 @@ harq_loopback(struct acc_queue *q, struct rte_bbdev_dec_op *op,
struct rte_mbuf *hq_output_head, *hq_output;
uint16_t harq_dma_length_in, harq_dma_length_out;
uint16_t harq_in_length = op->ldpc_dec.harq_combined_input.length;
+ bool ddr_mem_in;
+ union acc_harq_layout_data *harq_layout;
+ uint32_t harq_index;
if (harq_in_length == 0) {
rte_bbdev_log(ERR, "Loopback of invalid null size\n");
@@ -2553,13 +2552,12 @@ harq_loopback(struct acc_queue *q, struct rte_bbdev_dec_op *op,
}
harq_dma_length_out = harq_dma_length_in;
- bool ddr_mem_in = check_bit(op->ldpc_dec.op_flags,
+ ddr_mem_in = check_bit(op->ldpc_dec.op_flags,
RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE);
- union acc_harq_layout_data *harq_layout = q->d->harq_layout;
- uint16_t harq_index = (ddr_mem_in ?
+ harq_layout = q->d->harq_layout;
+ harq_index = hq_index(ddr_mem_in ?
op->ldpc_dec.harq_combined_input.offset :
- op->ldpc_dec.harq_combined_output.offset)
- / ACC_HARQ_OFFSET;
+ op->ldpc_dec.harq_combined_output.offset);
desc = acc_desc(q, total_enqueued_cbs);
fcw = &desc->req.fcw_ld;
--
2.37.1
next prev parent reply other threads:[~2022-10-18 16:44 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-19 0:38 [PATCH v4 00/30] baseband/acc100: changes for 22.11 Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 01/30] baseband/acc100: fix ring availability calculation Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 02/30] baseband/acc100: add function to check AQ availability Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 03/30] baseband/acc100: memory leak fix Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 04/30] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-10-20 9:58 ` [EXT] " Akhil Goyal
2022-10-19 0:38 ` [PATCH v4 05/30] baseband/acc100: check turbo dec/enc input Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 06/30] baseband/acc100: check for unlikely operation vals Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 07/30] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 08/30] baseband/acc100: allocate ring/queue mem when NULL Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 09/30] baseband/acc100: reduce input length for CRC24B Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 10/30] baseband/acc100: fix clearing PF IR outside handler Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 11/30] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 12/30] baseband/acc100: add protection for NULL HARQ input Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 13/30] baseband/acc100: reset pointer after rte_free Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 14/30] baseband/acc100: fix debug print for LDPC FCW Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 15/30] baseband/acc100: add enqueue status Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 16/30] baseband/acc100: add scatter-gather support Hernan Vargas
2022-10-19 0:39 ` Hernan Vargas [this message]
2022-10-19 0:39 ` [PATCH v4 18/30] baseband/acc100: enable input validation by default Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 19/30] baseband/acc100: added LDPC transport block support Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 20/30] baseband/acc100: update validate LDPC enc/dec Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 21/30] baseband/acc100: implement configurable queue depth Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 22/30] baseband/acc100: add queue stop operation Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 23/30] baseband/acc100: update uplink CB input length Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 24/30] baseband/acc100: update log messages Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 25/30] baseband/acc100: store FCW from first CB descriptor Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 26/30] baseband/acc100: update device info Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 27/30] baseband/acc100: add ring companion address Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 28/30] baseband/acc100: add workaround for deRM corner cases Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 29/30] baseband/acc100: configure PMON control registers Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 30/30] baseband/acc100: update guide docs Hernan Vargas
2022-10-20 9:59 ` [EXT] " Akhil Goyal
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