From: Hernan Vargas <hernan.vargas@intel.com>
To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,
maxime.coquelin@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com,
Hernan Vargas <hernan.vargas@intel.com>
Subject: [PATCH v4 29/30] baseband/acc100: configure PMON control registers
Date: Tue, 18 Oct 2022 17:39:17 -0700 [thread overview]
Message-ID: <20221019003918.257506-30-hernan.vargas@intel.com> (raw)
In-Reply-To: <20221019003918.257506-1-hernan.vargas@intel.com>
Enable performance monitor control registers.
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc/acc100_pmd.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/baseband/acc/acc100_pmd.h b/drivers/baseband/acc/acc100_pmd.h
index eb6349c85a..8c0aec5ed8 100644
--- a/drivers/baseband/acc/acc100_pmd.h
+++ b/drivers/baseband/acc/acc100_pmd.h
@@ -115,6 +115,8 @@ struct acc100_registry_addr {
unsigned int depth_log1_offset;
unsigned int qman_group_func;
unsigned int ddr_range;
+ unsigned int pmon_ctrl_a;
+ unsigned int pmon_ctrl_b;
};
/* Structure holding registry addresses for PF */
@@ -144,6 +146,8 @@ static const struct acc100_registry_addr pf_reg_addr = {
.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
.qman_group_func = HWPfQmgrGrpFunction0,
.ddr_range = HWPfDmaVfDdrBaseRw,
+ .pmon_ctrl_a = HWVfPmACntrlRegVf,
+ .pmon_ctrl_b = HWVfPmBCntrlRegVf,
};
/* Structure holding registry addresses for VF */
--
2.37.1
next prev parent reply other threads:[~2022-10-18 16:45 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-19 0:38 [PATCH v4 00/30] baseband/acc100: changes for 22.11 Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 01/30] baseband/acc100: fix ring availability calculation Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 02/30] baseband/acc100: add function to check AQ availability Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 03/30] baseband/acc100: memory leak fix Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 04/30] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-10-20 9:58 ` [EXT] " Akhil Goyal
2022-10-19 0:38 ` [PATCH v4 05/30] baseband/acc100: check turbo dec/enc input Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 06/30] baseband/acc100: check for unlikely operation vals Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 07/30] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 08/30] baseband/acc100: allocate ring/queue mem when NULL Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 09/30] baseband/acc100: reduce input length for CRC24B Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 10/30] baseband/acc100: fix clearing PF IR outside handler Hernan Vargas
2022-10-19 0:38 ` [PATCH v4 11/30] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 12/30] baseband/acc100: add protection for NULL HARQ input Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 13/30] baseband/acc100: reset pointer after rte_free Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 14/30] baseband/acc100: fix debug print for LDPC FCW Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 15/30] baseband/acc100: add enqueue status Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 16/30] baseband/acc100: add scatter-gather support Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 17/30] baseband/acc100: add HARQ index helper function Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 18/30] baseband/acc100: enable input validation by default Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 19/30] baseband/acc100: added LDPC transport block support Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 20/30] baseband/acc100: update validate LDPC enc/dec Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 21/30] baseband/acc100: implement configurable queue depth Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 22/30] baseband/acc100: add queue stop operation Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 23/30] baseband/acc100: update uplink CB input length Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 24/30] baseband/acc100: update log messages Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 25/30] baseband/acc100: store FCW from first CB descriptor Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 26/30] baseband/acc100: update device info Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 27/30] baseband/acc100: add ring companion address Hernan Vargas
2022-10-19 0:39 ` [PATCH v4 28/30] baseband/acc100: add workaround for deRM corner cases Hernan Vargas
2022-10-19 0:39 ` Hernan Vargas [this message]
2022-10-19 0:39 ` [PATCH v4 30/30] baseband/acc100: update guide docs Hernan Vargas
2022-10-20 9:59 ` [EXT] " Akhil Goyal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221019003918.257506-30-hernan.vargas@intel.com \
--to=hernan.vargas@intel.com \
--cc=dev@dpdk.org \
--cc=gakhil@marvell.com \
--cc=maxime.coquelin@redhat.com \
--cc=nicolas.chautru@intel.com \
--cc=qi.z.zhang@intel.com \
--cc=trix@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).