From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6B308A0553; Thu, 20 Oct 2022 19:31:51 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 16CEC410FC; Thu, 20 Oct 2022 19:31:51 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id A314540FAE; Thu, 20 Oct 2022 19:31:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666287110; x=1697823110; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=2rcRJiznIHgrpH8FeS8NIG3kTlROgbCMYK8kQdwdQ6c=; b=cwwtPFiqcZjg8yFHDnUHvdRWjQU0HjPP8duoWfxG7nAdB9xSIp4CxONV oV6eA1A4OQ+W7UWMPVeGetCMH5S6Y7pqvh2Dtx9h7EhLDBXWuk+hvvseD e6Awsjwv77ZVIqEmc2Dr3VpiOu84pObquNqOMhc4gTAWWW8E6VzwnbHti iZLUXXD9L7k7WNVJDpaalevd/16DuoxpKw1zdRZxBlnisYowhblAJuDWC jurXJXHWRSKh7I0xFCOObleTeEyNl28WJnom31ipJhaIkZfAGbgFfHR23 /bSbIFKz11GzJoHsO/hkxV/4Vo6dA9qg99s3dluozijPOKUm3mARD5roa g==; X-IronPort-AV: E=McAfee;i="6500,9779,10506"; a="333354053" X-IronPort-AV: E=Sophos;i="5.95,199,1661842800"; d="scan'208";a="333354053" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2022 10:31:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10506"; a="875140832" X-IronPort-AV: E=Sophos;i="5.95,199,1661842800"; d="scan'208";a="875140832" Received: from txanpdk02.an.intel.com ([10.123.117.76]) by fmsmga006.fm.intel.com with ESMTP; 20 Oct 2022 10:31:48 -0700 From: Abdullah Sevincer To: dev@dpdk.org Cc: jerinj@marvell.com, shivani.doneria@intel.com, tirthendu.sarkar@intel.com, Abdullah Sevincer , stable@dpdk.org Subject: [PATCH v3] event/dlb2: fix port COS range allocation Date: Thu, 20 Oct 2022 12:31:45 -0500 Message-Id: <20221020173145.4098491-1-abdullah.sevincer@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This commit fixes allocation of port COS when application requested port COS exceeds (e.g. beyond 0-15) the number of LDB ports for the domain. We limit application specified ports from a COS to the max ports allocated for the COS so that the rest of the of the ports can be allocated from default(best) COS. Fixes: bec8901bfe9f ("event/dlb2: support ldb port specific COS") Cc: stable@dpdk.org Signed-off-by: Abdullah Sevincer --- drivers/event/dlb2/dlb2.c | 9 ++++++--- drivers/event/dlb2/dlb2_priv.h | 2 ++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index 02f0e57208..60c5cd4804 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -182,8 +182,10 @@ dlb2_init_port_cos(struct dlb2_eventdev *dlb2, int *port_cos) for (q = 0; q < DLB2_MAX_NUM_PORTS_ALL; q++) { dlb2->ev_ports[q].cos_id = port_cos[q]; - if (port_cos[q] != DLB2_COS_DEFAULT) { + if (port_cos[q] != DLB2_COS_DEFAULT && + dlb2->cos_ports[port_cos[q]] < DLB2_MAX_NUM_LDB_PORTS_PER_COS) { dlb2->cos_ports[port_cos[q]]++; + dlb2->max_cos_port = q; } } } @@ -841,8 +843,9 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2, cos_ports = dlb2->cos_ports[0] + dlb2->cos_ports[1] + dlb2->cos_ports[2] + dlb2->cos_ports[3]; - if (cos_ports > resources_asked->num_ldb_ports) { - DLB2_LOG_ERR("dlb2: num_ldb_ports < nonzero cos_ports\n"); + if (cos_ports > resources_asked->num_ldb_ports || + (cos_ports && dlb2->max_cos_port >= resources_asked->num_ldb_ports)) { + DLB2_LOG_ERR("dlb2: num_ldb_ports < cos_ports\n"); ret = EINVAL; goto error_exit; } diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h index ac20c5a179..f4b9e7f9ff 100644 --- a/drivers/event/dlb2/dlb2_priv.h +++ b/drivers/event/dlb2/dlb2_priv.h @@ -92,6 +92,7 @@ #define DLB2_NUM_SN_GROUPS 2 #define DLB2_MAX_LDB_SN_ALLOC 1024 #define DLB2_MAX_QUEUE_DEPTH_THRESHOLD 8191 +#define DLB2_MAX_NUM_LDB_PORTS_PER_COS (DLB2_MAX_NUM_LDB_PORTS/DLB2_COS_NUM_VALS) /* 2048 total hist list entries and 64 total ldb ports, which * makes for 2048/64 == 32 hist list entries per port. However, CQ @@ -635,6 +636,7 @@ struct dlb2_eventdev { }; uint32_t cos_ports[DLB2_COS_NUM_VALS]; /* total ldb ports in each class */ uint32_t cos_bw[DLB2_COS_NUM_VALS]; /* bandwidth per cos domain */ + uint8_t max_cos_port; /* Max LDB port from any cos */ }; /* used for collecting and passing around the dev args */ -- 2.25.1