From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C4662A054A; Tue, 25 Oct 2022 11:09:52 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 435B842C1D; Tue, 25 Oct 2022 11:09:38 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 5268A42BB8 for ; Tue, 25 Oct 2022 11:09:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666688973; x=1698224973; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6TlPoreLGLVch4N1cu6rFWYj+keUNuzRnzird0W2OSE=; b=m2WxuqTl0gwY/tfaplGopaIg23rOoEaxHdmtx/50RI9milU6r//8IrQt /W4T0u+xceZSthl88PfkXlmLdH/vEiuG74uBBILDzuGjWXI7E3i5SQXkv fU7ehXgX0Ma10yzPHaEFCdzeXBNAhKx73Pd8Uyl0KUD/W5X+5urYt7GOC /SwVJgmTAwetrWOHvFYNqZYscAAGmksW9TX8C2Eh1pYOuuLVpw1RLRWuV 33+6qK7/HPpbON9IZplYZUos2c/9KwMJkz33PEJ4yoF6xitga5hhP2o8B wikpD1G3gMaXXFlGGqzxbRTjmLrP1BxXzDs9HpR26yt0x99T37fL/746g Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10510"; a="306358838" X-IronPort-AV: E=Sophos;i="5.95,211,1661842800"; d="scan'208";a="306358838" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2022 02:09:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10510"; a="756864611" X-IronPort-AV: E=Sophos;i="5.95,211,1661842800"; d="scan'208";a="756864611" Received: from dpdk-jf-ntb-one.sh.intel.com ([10.67.111.104]) by orsmga004.jf.intel.com with ESMTP; 25 Oct 2022 02:09:29 -0700 From: Junfeng Guo To: qi.z.zhang@intel.com, jingjing.wu@intel.com, ferruh.yigit@xilinx.com, beilei.xing@intel.com Cc: dev@dpdk.org, xiaoyun.li@intel.com, awogbemila@google.com, bruce.richardson@intel.com, hemant.agrawal@nxp.com, stephen@networkplumber.org, chenbo.xia@intel.com, helin.zhang@intel.com, Junfeng Guo Subject: [PATCH v8 6/8] net/gve: add support for dev info get and dev configure Date: Tue, 25 Oct 2022 17:07:27 +0800 Message-Id: <20221025090729.2593603-7-junfeng.guo@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221025090729.2593603-1-junfeng.guo@intel.com> References: <20221021091928.2674471-2-junfeng.guo@intel.com> <20221025090729.2593603-1-junfeng.guo@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add dev_ops dev_infos_get. Complete dev_configure with RX offloads force enabling. Signed-off-by: Xiaoyun Li Signed-off-by: Junfeng Guo --- doc/guides/nics/features/gve.ini | 2 ++ doc/guides/nics/gve.rst | 5 +++ drivers/net/gve/gve_ethdev.c | 59 +++++++++++++++++++++++++++++++- drivers/net/gve/gve_ethdev.h | 3 ++ 4 files changed, 68 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/features/gve.ini b/doc/guides/nics/features/gve.ini index d1703d8dab..986df7f94a 100644 --- a/doc/guides/nics/features/gve.ini +++ b/doc/guides/nics/features/gve.ini @@ -4,8 +4,10 @@ ; Refer to default.ini for the full list of available PMD features. ; [Features] +Speed capabilities = Y Link status = Y MTU update = Y +RSS hash = Y Linux = Y x86-32 = Y x86-64 = Y diff --git a/doc/guides/nics/gve.rst b/doc/guides/nics/gve.rst index 36a65e4717..1051d964f1 100644 --- a/doc/guides/nics/gve.rst +++ b/doc/guides/nics/gve.rst @@ -71,3 +71,8 @@ Also, only GQI_QPL queue format is in use on GCP since GQI_RDA hasn't been released in production. Currently, setting MTU with value larger than 1460 is not supported. + +Currently, only "RSS hash" is force enabled so that the backend hardware +device calculated hash values could be shared with applications. But for +RSS, there is no such API to config RSS hash function or RETA table. So, +limited RSS is supported only with default config/setting. diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c index 554f58640d..7fbe0c78c9 100644 --- a/drivers/net/gve/gve_ethdev.c +++ b/drivers/net/gve/gve_ethdev.c @@ -29,8 +29,16 @@ gve_write_version(uint8_t *driver_version_register) } static int -gve_dev_configure(__rte_unused struct rte_eth_dev *dev) +gve_dev_configure(struct rte_eth_dev *dev) { + struct gve_priv *priv = dev->data->dev_private; + + if (dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) + dev->data->dev_conf.rxmode.offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH; + + if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) + priv->enable_rsc = 1; + return 0; } @@ -96,6 +104,54 @@ gve_dev_close(struct rte_eth_dev *dev) return err; } +static int +gve_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) +{ + struct gve_priv *priv = dev->data->dev_private; + + dev_info->device = dev->device; + dev_info->max_mac_addrs = 1; + dev_info->max_rx_queues = priv->max_nb_rxq; + dev_info->max_tx_queues = priv->max_nb_txq; + dev_info->min_rx_bufsize = GVE_MIN_BUF_SIZE; + dev_info->max_rx_pktlen = GVE_MAX_RX_PKTLEN; + dev_info->max_mtu = GVE_MAX_MTU; + dev_info->min_mtu = GVE_MIN_MTU; + + dev_info->rx_offload_capa = 0; + dev_info->tx_offload_capa = 0; + + if (priv->queue_format == GVE_DQO_RDA_FORMAT) + dev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TCP_LRO; + + dev_info->default_rxconf = (struct rte_eth_rxconf) { + .rx_free_thresh = GVE_DEFAULT_RX_FREE_THRESH, + .rx_drop_en = 0, + .offloads = 0, + }; + + dev_info->default_txconf = (struct rte_eth_txconf) { + .tx_free_thresh = GVE_DEFAULT_TX_FREE_THRESH, + .offloads = 0, + }; + + dev_info->default_rxportconf.ring_size = priv->rx_desc_cnt; + dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = priv->rx_desc_cnt, + .nb_min = priv->rx_desc_cnt, + .nb_align = 1, + }; + + dev_info->default_txportconf.ring_size = priv->tx_desc_cnt; + dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = priv->tx_desc_cnt, + .nb_min = priv->tx_desc_cnt, + .nb_align = 1, + }; + + return 0; +} + static int gve_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) { @@ -128,6 +184,7 @@ static const struct eth_dev_ops gve_eth_dev_ops = { .dev_start = gve_dev_start, .dev_stop = gve_dev_stop, .dev_close = gve_dev_close, + .dev_infos_get = gve_dev_info_get, .link_update = gve_link_update, .mtu_set = gve_dev_mtu_set, }; diff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h index 2ac2a46ac1..57c29374b5 100644 --- a/drivers/net/gve/gve_ethdev.h +++ b/drivers/net/gve/gve_ethdev.h @@ -18,6 +18,9 @@ #define GVE_MIN_BUF_SIZE 1024 #define GVE_MAX_RX_PKTLEN 65535 +#define GVE_MAX_MTU RTE_ETHER_MTU +#define GVE_MIN_MTU RTE_ETHER_MIN_MTU + /* A list of pages registered with the device during setup and used by a queue * as buffers */ -- 2.34.1