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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2022 09:22:13.3148 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 028873dd-1456-41f1-98e8-08dac5588cba X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT058.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6051 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The event core is mlx5 vDPA driver devarg that selects the CPU core for the internal timer thread used to manage data-path events into the driver. Emphasize that this CPU should be isolated for vDPA mlx5 devices only in order to save the performance and latency of the device. Signed-off-by: Matan Azrad --- doc/guides/vdpadevs/mlx5.rst | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/doc/guides/vdpadevs/mlx5.rst b/doc/guides/vdpadevs/mlx5.rst index 9767fbe42d..3b5ce6df38 100644 --- a/doc/guides/vdpadevs/mlx5.rst +++ b/doc/guides/vdpadevs/mlx5.rst @@ -86,8 +86,13 @@ for an additional list of options shared with other mlx5 drivers. - ``event_core`` parameter [int] - CPU core number to set polling thread affinity to, default to control plane - cpu. + The CPU core number of the timer thread, default: EAL main lcore. + +.. note:: + + This core can be shared among different mlx5 vDPA devices as `event_core` but + using it also for other tasks may affect the performance and the latency of the + mlx5 vDPA devices. - ``max_conf_threads`` parameter [int] -- 2.25.1