From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>
Cc: <jerinj@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 06/11] net/cnxk: fix packet type for IPv6 packets post decryption
Date: Mon, 28 Nov 2022 15:24:37 +0530 [thread overview]
Message-ID: <20221128095442.3185112-6-ndabilpuram@marvell.com> (raw)
In-Reply-To: <20221128095442.3185112-1-ndabilpuram@marvell.com>
Update ptype properly for IPv6 packets post inline decryption.
Fixes: 4440eb88ddfc ("net/cnxk: use full context IPsec structures")
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/net/cnxk/cn9k_rx.h | 17 +++++++----------
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/net/cnxk/cn9k_rx.h b/drivers/net/cnxk/cn9k_rx.h
index 1a9f920b41..0e23609df5 100644
--- a/drivers/net/cnxk/cn9k_rx.h
+++ b/drivers/net/cnxk/cn9k_rx.h
@@ -260,8 +260,8 @@ nix_rx_sec_mbuf_err_update(const union nix_rx_parse_u *rx, uint16_t res,
}
static __rte_always_inline uint64_t
-nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,
- uintptr_t sa_base, uint64_t *rearm_val, uint16_t *len)
+nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m, uintptr_t sa_base,
+ uint64_t *rearm_val, uint16_t *len, uint32_t packet_type)
{
uintptr_t res_sg0 = ((uintptr_t)cq + ROC_ONF_IPSEC_INB_RES_OFF - 8);
const union nix_rx_parse_u *rx =
@@ -315,15 +315,18 @@ nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,
ip = (struct rte_ipv4_hdr *)(data + ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +
ROC_ONF_IPSEC_INB_MAX_L2_SZ);
+ packet_type = (packet_type & ~(RTE_PTYPE_L3_MASK | RTE_PTYPE_TUNNEL_MASK));
if (((ip->version_ihl & 0xf0) >> RTE_IPV4_IHL_MULTIPLIER) ==
IPVERSION) {
*len = rte_be_to_cpu_16(ip->total_length) + lcptr;
+ packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
} else {
PLT_ASSERT(((ip->version_ihl & 0xf0) >>
RTE_IPV4_IHL_MULTIPLIER) == 6);
ip6 = (struct rte_ipv6_hdr *)ip;
*len = rte_be_to_cpu_16(ip6->payload_len) +
sizeof(struct rte_ipv6_hdr) + lcptr;
+ packet_type |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
}
/* Update data offset */
@@ -332,6 +335,7 @@ nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,
*rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);
*rearm_val |= data_off;
+ m->packet_type = packet_type;
return RTE_MBUF_F_RX_SEC_OFFLOAD;
}
@@ -363,14 +367,7 @@ cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
/* Get SA Base from lookup mem */
sa_base = cnxk_nix_sa_base_get(port, lookup_mem);
- ol_flags |= nix_rx_sec_mbuf_update(cq, mbuf, sa_base, &val,
- &len);
-
- /* Only Tunnel inner IPv4 is supported */
- packet_type = (packet_type &
- ~(RTE_PTYPE_L3_MASK | RTE_PTYPE_TUNNEL_MASK));
- packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
- mbuf->packet_type = packet_type;
+ ol_flags |= nix_rx_sec_mbuf_update(cq, mbuf, sa_base, &val, &len, packet_type);
goto skip_parse;
}
--
2.25.1
next prev parent reply other threads:[~2022-11-28 9:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-28 9:54 [PATCH 01/11] common/cnxk: free pending sqe buffers Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 02/11] net/cnxk: register callback to get queue errors Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 03/11] common/cnxk: set default SQ TC value Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 04/11] common/cnxk: split NIX TM hierarchy enable API Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 05/11] event/cnxk: net/cnxk: support transmit completion Nithin Dabilpuram
2022-11-28 9:54 ` Nithin Dabilpuram [this message]
2022-11-28 9:54 ` [PATCH 07/11] net/cnxk: add late backpressure support for cn10kb Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 08/11] common/cnxk: use lcore LMT line for CPT context write Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 09/11] common/cnxk: convert aura handle to aura Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 10/11] net/cnxk: mark HW errors as bad checksum Nithin Dabilpuram
2022-11-28 9:54 ` [PATCH 11/11] common/cnxk: disable drop re in A1 chip revision Nithin Dabilpuram
2023-01-06 13:22 ` Jerin Jacob
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