From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E75A24240B; Wed, 18 Jan 2023 09:28:45 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9E58442D74; Wed, 18 Jan 2023 09:27:58 +0100 (CET) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id 45DC942D74 for ; Wed, 18 Jan 2023 09:27:57 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674030477; x=1705566477; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fu87rIxG23frOovlnByNzSCBfnp3YYatOfDVOpcB6nk=; b=TOotQTZM1UDsmMT8cp9gXkAv+5YXloMSBCQFNR80o72CNvsKymxHeHQn Gc5Wg+kRwIc8vPe5vOg46EgVfPSbLQvYgaECRy5km8P3QN7F0EMTY+8Pr Ng/8IhoO6CyDSb4KWX29jE5ljgTezzthFciWHOofCcHxUPsP5acAEpN7W 5x4eWR9fCWztiw53lSlHQCSoFq+ZkGS0BukrCZ4EDevfkSXcfKEsQ5mTR eLmEO6Qg0sVGooUIRF57JkQ99ePIgh78FvS90y4czveM9JjjY/B8Heh9R D56eNZm7chCBlLM2UOydc4sUpsnOlhjglmo49Mz9U1OJmGZ0ane99ajvO w==; X-IronPort-AV: E=McAfee;i="6500,9779,10593"; a="305304255" X-IronPort-AV: E=Sophos;i="5.97,224,1669104000"; d="scan'208";a="305304255" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jan 2023 00:27:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10593"; a="652835287" X-IronPort-AV: E=Sophos;i="5.97,224,1669104000"; d="scan'208";a="652835287" Received: from dpdk-mingxial-01.sh.intel.com ([10.67.119.167]) by orsmga007.jf.intel.com with ESMTP; 18 Jan 2023 00:27:55 -0800 From: Mingxia Liu To: dev@dpdk.org, qi.z.zhang@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com Cc: wenjun1.wu@intel.com, Mingxia Liu Subject: [PATCH v3 09/21] net/cpfl: support basic Rx data path Date: Wed, 18 Jan 2023 07:31:45 +0000 Message-Id: <20230118073154.903012-10-mingxia.liu@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230118073154.903012-1-mingxia.liu@intel.com> References: <20230113081931.221576-1-mingxia.liu@intel.com> <20230118073154.903012-1-mingxia.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add basic Rx support in split queue mode and single queue mode. Signed-off-by: Mingxia Liu --- drivers/net/cpfl/cpfl_ethdev.c | 2 ++ drivers/net/cpfl/cpfl_rxtx.c | 11 +++++++++++ drivers/net/cpfl/cpfl_rxtx.h | 1 + 3 files changed, 14 insertions(+) diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c index 1f40f1749e..ca5b7f952e 100644 --- a/drivers/net/cpfl/cpfl_ethdev.c +++ b/drivers/net/cpfl/cpfl_ethdev.c @@ -255,6 +255,8 @@ cpfl_dev_start(struct rte_eth_dev *dev) return ret; } + cpfl_set_rx_function(dev); + ret = idpf_vc_ena_dis_vport(vport, true); if (ret != 0) { PMD_DRV_LOG(ERR, "Failed to enable vport"); diff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c index 4ed15ef7f4..8d1d31e186 100644 --- a/drivers/net/cpfl/cpfl_rxtx.c +++ b/drivers/net/cpfl/cpfl_rxtx.c @@ -734,3 +734,14 @@ cpfl_stop_queues(struct rte_eth_dev *dev) PMD_DRV_LOG(WARNING, "Fail to stop Tx queue %d", i); } } + +void +cpfl_set_rx_function(struct rte_eth_dev *dev) +{ + struct idpf_vport *vport = dev->data->dev_private; + + if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) + dev->rx_pkt_burst = idpf_splitq_recv_pkts; + else + dev->rx_pkt_burst = idpf_singleq_recv_pkts; +} diff --git a/drivers/net/cpfl/cpfl_rxtx.h b/drivers/net/cpfl/cpfl_rxtx.h index 037d479d56..c29c30c7a3 100644 --- a/drivers/net/cpfl/cpfl_rxtx.h +++ b/drivers/net/cpfl/cpfl_rxtx.h @@ -37,4 +37,5 @@ int cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id); int cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id); void cpfl_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid); void cpfl_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid); +void cpfl_set_rx_function(struct rte_eth_dev *dev); #endif /* _CPFL_RXTX_H_ */ -- 2.25.1