From: Leo Xu <yongquanx@nvidia.com>
To: <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Subject: [PATCH v3 2/3] net/mlx5: add ICMPv6 ID and sequence match support
Date: Sun, 5 Feb 2023 15:41:53 +0200 [thread overview]
Message-ID: <20230205134154.408984-3-yongquanx@nvidia.com> (raw)
In-Reply-To: <20230205134154.408984-1-yongquanx@nvidia.com>
This patch adds ICMPv6 ID and sequence match support.
Since type and code of ICMPv6 echo is already specified by ITEM type:
RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST
RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY
mlx5 pmd will set appropriate type and code automatically:
Echo request: type(128), code(0)
Echo reply: type(129), code(0)
type and code provided by application will be ignored.
Signed-off-by: Leo Xu <yongquanx@nvidia.com>
---
doc/guides/nics/features/mlx5.ini | 2 +
doc/guides/nics/mlx5.rst | 4 +-
doc/guides/rel_notes/release_23_03.rst | 4 ++
drivers/net/mlx5/mlx5_flow.c | 61 +++++++++++++++++++++
drivers/net/mlx5/mlx5_flow.h | 4 ++
drivers/net/mlx5/mlx5_flow_dv.c | 76 ++++++++++++++++++++++++++
drivers/net/mlx5/mlx5_flow_hw.c | 2 +
7 files changed, 151 insertions(+), 2 deletions(-)
diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini
index 62fd330e2b..eb016f34da 100644
--- a/doc/guides/nics/features/mlx5.ini
+++ b/doc/guides/nics/features/mlx5.ini
@@ -69,6 +69,8 @@ gtp = Y
gtp_psc = Y
icmp = Y
icmp6 = Y
+icmp6_echo_request = Y
+icmp6_echo_reply = Y
integrity = Y
ipv4 = Y
ipv6 = Y
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index f137f156f9..9c6f1cca19 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -405,8 +405,8 @@ Limitations
- The input buffer, providing the removal size, is not validated.
- The buffer size must match the length of the headers to be removed.
-- ICMP(code/type/identifier/sequence number) / ICMP6(code/type) matching, IP-in-IP and MPLS flow matching are all
- mutually exclusive features which cannot be supported together
+- ICMP(code/type/identifier/sequence number) / ICMP6(code/type/identifier/sequence number) matching,
+ IP-in-IP and MPLS flow matching are all mutually exclusive features which cannot be supported together
(see :ref:`mlx5_firmware_config`).
- LRO:
diff --git a/doc/guides/rel_notes/release_23_03.rst b/doc/guides/rel_notes/release_23_03.rst
index 3f5c7af3b6..cac69e3173 100644
--- a/doc/guides/rel_notes/release_23_03.rst
+++ b/doc/guides/rel_notes/release_23_03.rst
@@ -74,6 +74,10 @@ New Features
* Added flow items to match ICMPv6 echo request and reply packets.
Matching patterns can include ICMP identifier and sequence numbers.
+* **Updated Mellanox mlx5 driver.**
+
+ * Added support for matching on ICMPv6 ID and sequence fields.
+
Removed Items
-------------
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index f5e2831480..b38062c70e 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -2352,6 +2352,67 @@ mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
return 0;
}
+/**
+ * Validate ICMP6 echo request/reply item.
+ *
+ * @param[in] item
+ * Item specification.
+ * @param[in] item_flags
+ * Bit-fields that holds the items detected until now.
+ * @param[in] ext_vlan_sup
+ * Whether extended VLAN features are supported or not.
+ * @param[out] error
+ * Pointer to error structure.
+ *
+ * @return
+ * 0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+int
+mlx5_flow_validate_item_icmp6_echo(const struct rte_flow_item *item,
+ uint64_t item_flags,
+ uint8_t target_protocol,
+ struct rte_flow_error *error)
+{
+ const struct rte_flow_item_icmp6_echo *mask = item->mask;
+ const struct rte_flow_item_icmp6_echo nic_mask = {
+ .hdr.base.type = 0xff,
+ .hdr.base.code = 0xff,
+ .hdr.identifier = RTE_BE16(0xffff),
+ .hdr.sequence = RTE_BE16(0xffff),
+ };
+ const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
+ const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
+ MLX5_FLOW_LAYER_OUTER_L3_IPV6;
+ const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
+ MLX5_FLOW_LAYER_OUTER_L4;
+ int ret;
+
+ if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM, item,
+ "protocol filtering not compatible"
+ " with ICMP6 layer");
+ if (!(item_flags & l3m))
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM, item,
+ "IPv6 is mandatory to filter on"
+ " ICMP6");
+ if (item_flags & l4m)
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM, item,
+ "multiple L4 layers not supported");
+ if (!mask)
+ mask = &nic_mask;
+ ret = mlx5_flow_item_acceptable
+ (item, (const uint8_t *)mask,
+ (const uint8_t *)&nic_mask,
+ sizeof(struct rte_flow_item_icmp6_echo),
+ MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
+ if (ret < 0)
+ return ret;
+ return 0;
+}
+
/**
* Validate ICMP item.
*
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index e376dcae93..86311b0b08 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -2322,6 +2322,10 @@ int mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
uint64_t item_flags,
uint8_t target_protocol,
struct rte_flow_error *error);
+int mlx5_flow_validate_item_icmp6_echo(const struct rte_flow_item *item,
+ uint64_t item_flags,
+ uint8_t target_protocol,
+ struct rte_flow_error *error);
int mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
uint64_t item_flags,
uint8_t target_protocol,
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 7ca909999b..2ac9587761 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -7370,6 +7370,17 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
item_ipv6_proto = IPPROTO_ICMPV6;
last_item = MLX5_FLOW_LAYER_ICMP6;
break;
+ case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST:
+ case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY:
+ ret = mlx5_flow_validate_item_icmp6_echo(items,
+ item_flags,
+ next_protocol,
+ error);
+ if (ret < 0)
+ return ret;
+ item_ipv6_proto = IPPROTO_ICMPV6;
+ last_item = MLX5_FLOW_LAYER_ICMP6;
+ break;
case RTE_FLOW_ITEM_TYPE_TAG:
ret = flow_dv_validate_item_tag(dev, items,
attr, error);
@@ -10269,6 +10280,65 @@ flow_dv_translate_item_icmp6(void *key, const struct rte_flow_item *item,
icmp6_v->code & icmp6_m->code);
}
+/**
+ * Add ICMP6 echo request/reply item to the value.
+ *
+ * @param[in, out] key
+ * Flow matcher value.
+ * @param[in] item
+ * Flow pattern to translate.
+ * @param[in] inner
+ * Item is inner pattern.
+ * @param[in] key_type
+ * Set flow matcher mask or value.
+ */
+static void
+flow_dv_translate_item_icmp6_echo(void *key, const struct rte_flow_item *item,
+ int inner, uint32_t key_type)
+{
+ const struct rte_flow_item_icmp6_echo *icmp6_m;
+ const struct rte_flow_item_icmp6_echo *icmp6_v;
+ uint32_t icmp6_header_data_m = 0;
+ uint32_t icmp6_header_data_v = 0;
+ void *headers_v;
+ void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
+ uint8_t icmp6_type = 0;
+ struct rte_flow_item_icmp6_echo zero_mask;
+
+ memset(&zero_mask, 0, sizeof(zero_mask));
+ headers_v = inner ? MLX5_ADDR_OF(fte_match_param, key, inner_headers) :
+ MLX5_ADDR_OF(fte_match_param, key, outer_headers);
+ if (key_type & MLX5_SET_MATCHER_M)
+ MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, 0xFF);
+ else
+ MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
+ IPPROTO_ICMPV6);
+ MLX5_ITEM_UPDATE(item, key_type, icmp6_v, icmp6_m, &zero_mask);
+ /* Set fixed type and code for icmpv6 echo request or reply */
+ icmp6_type = (item->type == RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST ?
+ RTE_ICMP6_ECHO_REQUEST : RTE_ICMP6_ECHO_REPLY);
+ if (key_type & MLX5_SET_MATCHER_M) {
+ MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type, 0xFF);
+ MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code, 0xFF);
+ } else {
+ MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type, icmp6_type);
+ MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code, 0);
+ }
+ if (icmp6_v == NULL)
+ return;
+ /* Set icmp6 header data (identifier & sequence) accordingly */
+ icmp6_header_data_m =
+ (rte_be_to_cpu_16(icmp6_m->hdr.identifier) << 16) |
+ rte_be_to_cpu_16(icmp6_m->hdr.sequence);
+ if (icmp6_header_data_m) {
+ icmp6_header_data_v =
+ (rte_be_to_cpu_16(icmp6_v->hdr.identifier) << 16) |
+ rte_be_to_cpu_16(icmp6_v->hdr.sequence);
+ MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_header_data,
+ icmp6_header_data_v & icmp6_header_data_m);
+ }
+}
+
/**
* Add ICMP item to the value.
*
@@ -13381,6 +13451,12 @@ flow_dv_translate_items(struct rte_eth_dev *dev,
wks->priority = MLX5_PRIORITY_MAP_L4;
last_item = MLX5_FLOW_LAYER_ICMP6;
break;
+ case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST:
+ case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY:
+ flow_dv_translate_item_icmp6_echo(key, items, tunnel, key_type);
+ wks->priority = MLX5_PRIORITY_MAP_L4;
+ last_item = MLX5_FLOW_LAYER_ICMP6;
+ break;
case RTE_FLOW_ITEM_TYPE_TAG:
flow_dv_translate_item_tag(dev, key, items, key_type);
last_item = MLX5_FLOW_ITEM_TAG;
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 20c71ff7f0..dbf935ca26 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -4731,6 +4731,8 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev,
case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
case RTE_FLOW_ITEM_TYPE_ICMP:
case RTE_FLOW_ITEM_TYPE_ICMP6:
+ case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST:
+ case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY:
case RTE_FLOW_ITEM_TYPE_CONNTRACK:
break;
case RTE_FLOW_ITEM_TYPE_INTEGRITY:
--
2.27.0
next prev parent reply other threads:[~2023-02-05 13:42 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-12 8:59 [PATCH 0/3] support match icmpv6 id and sequence Leo Xu
2022-12-12 8:59 ` [PATCH 1/3] ethdev: add ICMPv6 " Leo Xu
2022-12-12 8:59 ` [PATCH 2/3] net/mlx5: add ICMPv6 id and sequence match support Leo Xu
2022-12-12 8:59 ` [PATCH 3/3] net/mlx5/hws: " Leo Xu
2022-12-20 7:44 ` [PATCH v2 0/3] support match icmpv6 ID and sequence Leo Xu
2022-12-20 7:44 ` [PATCH v2 1/3] ethdev: add ICMPv6 " Leo Xu
2023-01-03 8:17 ` Ori Kam
2023-01-18 9:30 ` Thomas Monjalon
2023-01-31 6:53 ` Leo Xu (Networking SW)
2023-02-01 9:56 ` Thomas Monjalon
2023-02-02 18:33 ` Leo Xu (Networking SW)
2023-02-02 21:23 ` Thomas Monjalon
2023-02-03 2:56 ` Leo Xu (Networking SW)
2023-01-26 10:45 ` Ferruh Yigit
2023-01-31 3:58 ` Leo Xu (Networking SW)
2022-12-20 7:44 ` [PATCH v2 2/3] net/mlx5: add ICMPv6 ID and sequence match support Leo Xu
2023-01-18 8:55 ` Thomas Monjalon
2023-01-31 6:57 ` Leo Xu (Networking SW)
2022-12-20 7:44 ` [PATCH v2 3/3] net/mlx5/hws: " Leo Xu
2023-01-18 8:58 ` Thomas Monjalon
2023-01-31 6:56 ` Leo Xu (Networking SW)
2023-01-26 10:47 ` [PATCH v2 0/3] support match icmpv6 ID and sequence Ferruh Yigit
2023-01-31 3:54 ` Leo Xu (Networking SW)
2023-02-05 13:41 ` [PATCH v3 " Leo Xu
2023-02-05 13:41 ` [PATCH v3 1/3] ethdev: add ICMPv6 " Leo Xu
2023-02-05 13:41 ` Leo Xu [this message]
2023-02-07 13:48 ` [PATCH v3 2/3] net/mlx5: add ICMPv6 ID and sequence match support Slava Ovsiienko
2023-02-05 13:41 ` [PATCH v3 3/3] net/mlx5/hws: " Leo Xu
2023-02-07 13:05 ` Alex Vesker
2023-02-07 13:49 ` Slava Ovsiienko
2023-02-09 13:04 ` [PATCH v3 0/3] support match icmpv6 ID and sequence Ferruh Yigit
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