From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CD64B41C4D; Thu, 9 Feb 2023 10:44:48 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DDF0942D82; Thu, 9 Feb 2023 10:43:37 +0100 (CET) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mails.dpdk.org (Postfix) with ESMTP id AF7A3410EA for ; Thu, 9 Feb 2023 10:43:33 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675935813; x=1707471813; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rWd4asIpxuAnxwIJxaJWVHszZnTQBar/qLBlZRxmOIk=; b=Z78kyVQnxLpKLHVpUC9tEL3Ps91bUyNnbF2SAJQ0Dph0E6bgsnY3nOGR 4POkOk3tVLspPmlHniW8l4DvvsbKwcGBsxJ8nP0Hw/BvrMqqhtXG9APiD 2qzMU06gKLbWw8Nxwg6FBa4jSFG/y8zgTZZg0eUCq8tF70apeGapIurF3 7PHq9ho0KVsdC1ZI5k+ewNUvpOuwq0PsYS4aP43eioQZ22Xaf/VubmPmI D+O5xUqmTKIw++nYC7H7DzyXa6XiPH+5jI+mqTxc6EcAbHaR4RpT/YFu4 54zXvGMpp7TW+BHZFLkth07osBM7tWbJiZE05wjZbdt2g0hn1+lRja5PD w==; X-IronPort-AV: E=McAfee;i="6500,9779,10615"; a="309712423" X-IronPort-AV: E=Sophos;i="5.97,283,1669104000"; d="scan'208";a="309712423" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2023 01:43:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10615"; a="697964773" X-IronPort-AV: E=Sophos;i="5.97,283,1669104000"; d="scan'208";a="697964773" Received: from dpdk-mingxial-01.sh.intel.com ([10.67.119.167]) by orsmga008.jf.intel.com with ESMTP; 09 Feb 2023 01:43:20 -0800 From: Mingxia Liu To: dev@dpdk.org, qi.z.zhang@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com Cc: Mingxia Liu , Wenjun Wu Subject: [PATCH v5 17/21] net/cpfl: add AVX512 data path for split queue model Date: Thu, 9 Feb 2023 08:45:37 +0000 Message-Id: <20230209084541.2712723-18-mingxia.liu@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230209084541.2712723-1-mingxia.liu@intel.com> References: <20230118075738.904616-1-mingxia.liu@intel.com> <20230209084541.2712723-1-mingxia.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support of AVX512 data path for split queue model. Signed-off-by: Wenjun Wu Signed-off-by: Mingxia Liu --- drivers/net/cpfl/cpfl_rxtx.c | 56 +++++++++++++++++++++++-- drivers/net/cpfl/cpfl_rxtx_vec_common.h | 20 ++++++++- 2 files changed, 71 insertions(+), 5 deletions(-) diff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c index c81e830c6a..d55ce9696d 100644 --- a/drivers/net/cpfl/cpfl_rxtx.c +++ b/drivers/net/cpfl/cpfl_rxtx.c @@ -759,7 +759,8 @@ cpfl_set_rx_function(struct rte_eth_dev *dev) if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512) #ifdef CC_AVX512_SUPPORT if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 && - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1) + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1 && + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512DQ)) vport->rx_use_avx512 = true; #else PMD_DRV_LOG(NOTICE, @@ -772,6 +773,21 @@ cpfl_set_rx_function(struct rte_eth_dev *dev) #ifdef RTE_ARCH_X86 if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) { + if (vport->rx_vec_allowed) { + for (i = 0; i < dev->data->nb_rx_queues; i++) { + rxq = dev->data->rx_queues[i]; + (void)idpf_qc_splitq_rx_vec_setup(rxq); + } +#ifdef CC_AVX512_SUPPORT + if (vport->rx_use_avx512) { + PMD_DRV_LOG(NOTICE, + "Using Split AVX512 Vector Rx (port %d).", + dev->data->port_id); + dev->rx_pkt_burst = idpf_dp_splitq_recv_pkts_avx512; + return; + } +#endif /* CC_AVX512_SUPPORT */ + } PMD_DRV_LOG(NOTICE, "Using Split Scalar Rx (port %d).", dev->data->port_id); @@ -827,9 +843,17 @@ cpfl_set_tx_function(struct rte_eth_dev *dev) vport->tx_vec_allowed = true; if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512) #ifdef CC_AVX512_SUPPORT + { if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1) vport->tx_use_avx512 = true; + if (vport->tx_use_avx512) { + for (i = 0; i < dev->data->nb_tx_queues; i++) { + txq = dev->data->tx_queues[i]; + idpf_qc_tx_vec_avx512_setup(txq); + } + } + } #else PMD_DRV_LOG(NOTICE, "AVX512 is not supported in build env"); @@ -839,14 +863,26 @@ cpfl_set_tx_function(struct rte_eth_dev *dev) } #endif /* RTE_ARCH_X86 */ +#ifdef RTE_ARCH_X86 if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) { + if (vport->tx_vec_allowed) { +#ifdef CC_AVX512_SUPPORT + if (vport->tx_use_avx512) { + PMD_DRV_LOG(NOTICE, + "Using Split AVX512 Vector Tx (port %d).", + dev->data->port_id); + dev->tx_pkt_burst = idpf_dp_splitq_xmit_pkts_avx512; + dev->tx_pkt_prepare = idpf_dp_prep_pkts; + return; + } +#endif /* CC_AVX512_SUPPORT */ + } PMD_DRV_LOG(NOTICE, "Using Split Scalar Tx (port %d).", dev->data->port_id); dev->tx_pkt_burst = idpf_dp_splitq_xmit_pkts; dev->tx_pkt_prepare = idpf_dp_prep_pkts; } else { -#ifdef RTE_ARCH_X86 if (vport->tx_vec_allowed) { #ifdef CC_AVX512_SUPPORT if (vport->tx_use_avx512) { @@ -865,11 +901,25 @@ cpfl_set_tx_function(struct rte_eth_dev *dev) } #endif /* CC_AVX512_SUPPORT */ } -#endif /* RTE_ARCH_X86 */ PMD_DRV_LOG(NOTICE, "Using Single Scalar Tx (port %d).", dev->data->port_id); dev->tx_pkt_burst = idpf_dp_singleq_xmit_pkts; dev->tx_pkt_prepare = idpf_dp_prep_pkts; } +#else + if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) { + PMD_DRV_LOG(NOTICE, + "Using Split Scalar Tx (port %d).", + dev->data->port_id); + dev->tx_pkt_burst = idpf_dp_splitq_xmit_pkts; + dev->tx_pkt_prepare = idpf_dp_prep_pkts; + } else { + PMD_DRV_LOG(NOTICE, + "Using Single Scalar Tx (port %d).", + dev->data->port_id); + dev->tx_pkt_burst = idpf_dp_singleq_xmit_pkts; + dev->tx_pkt_prepare = idpf_dp_prep_pkts; + } +#endif /* RTE_ARCH_X86 */ } diff --git a/drivers/net/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/cpfl/cpfl_rxtx_vec_common.h index 2d4c6a0ef3..665418d27d 100644 --- a/drivers/net/cpfl/cpfl_rxtx_vec_common.h +++ b/drivers/net/cpfl/cpfl_rxtx_vec_common.h @@ -64,15 +64,31 @@ cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq) return CPFL_VECTOR_PATH; } +static inline int +cpfl_rx_splitq_vec_default(struct idpf_rx_queue *rxq) +{ + if (rxq->bufq2->rx_buf_len < rxq->max_pkt_len) + return CPFL_SCALAR_PATH; + + return CPFL_VECTOR_PATH; +} + static inline int cpfl_rx_vec_dev_check_default(struct rte_eth_dev *dev) { + struct idpf_vport *vport = dev->data->dev_private; struct idpf_rx_queue *rxq; - int i, ret = 0; + int i, default_ret, splitq_ret, ret = CPFL_SCALAR_PATH; for (i = 0; i < dev->data->nb_rx_queues; i++) { rxq = dev->data->rx_queues[i]; - ret = (cpfl_rx_vec_queue_default(rxq)); + default_ret = cpfl_rx_vec_queue_default(rxq); + if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) { + splitq_ret = cpfl_rx_splitq_vec_default(rxq); + ret = splitq_ret && default_ret; + } else { + ret = default_ret; + } if (ret == CPFL_SCALAR_PATH) return CPFL_SCALAR_PATH; } -- 2.25.1