From: Rongwei Liu <rongweil@nvidia.com>
To: <dev@dpdk.org>, <matan@nvidia.com>, <viacheslavo@nvidia.com>,
<orika@nvidia.com>, <thomas@monjalon.net>
Cc: <rasland@nvidia.com>
Subject: [PATCH v1] net/mlx5: enable hint in async table
Date: Thu, 16 Feb 2023 07:49:23 +0200 [thread overview]
Message-ID: <20230216054923.3973237-1-rongweil@nvidia.com> (raw)
Driver gets the hint value from rte_table_attr for async flow.
Parse the value and pass the supported value to hardware accordingly.
Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
---
drivers/net/mlx5/mlx5_flow_hw.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index b67b33bc22..06d6909974 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -3102,6 +3102,15 @@ flow_hw_table_create(struct rte_eth_dev *dev,
matcher_attr.optimize_using_rule_idx = true;
matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE;
matcher_attr.rule.num_log = rte_log2_u32(nb_flows);
+ /* Parse hints information. */
+ if (attr->specialize) {
+ if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_WIRE_ORIG)
+ matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_WIRE;
+ else if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_VPORT_ORIG)
+ matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_VPORT;
+ else
+ DRV_LOG(INFO, "Unsupported hint value %x", attr->specialize);
+ }
/* Build the item template. */
for (i = 0; i < nb_item_templates; i++) {
uint32_t ret;
--
2.27.0
next reply other threads:[~2023-02-16 5:49 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-16 5:49 Rongwei Liu [this message]
2023-03-06 8:22 ` Rongwei Liu
2023-03-06 11:36 ` [PATCH v2] " Rongwei Liu
2023-03-06 11:59 ` Slava Ovsiienko
2023-03-07 9:02 ` Raslan Darawsheh
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