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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2023 12:49:33.1439 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c92f5ca9-a2ea-415e-6276-08db159c6994 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT019.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6169 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add flex item modify field HWS implementation. The minimum modify boundary is one byte. Signed-off-by: Rongwei Liu Acked-by: Viacheslav Ovsiienko --- doc/guides/nics/mlx5.rst | 4 +- drivers/common/mlx5/mlx5_prm.h | 1 + drivers/net/mlx5/mlx5_flow.h | 3 + drivers/net/mlx5/mlx5_flow_dv.c | 165 +++++++++++++++++++++++++++++--- drivers/net/mlx5/mlx5_flow_hw.c | 14 ++- 5 files changed, 173 insertions(+), 14 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index f182baa37e..09828a5cf4 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -108,6 +108,7 @@ Features - Sub-Function. - Matching on represented port. - Matching on IPv6 routing extension header. +- Modify flex item field. Limitations @@ -291,11 +292,12 @@ Limitations - Firmware supports 8 global sample fields. Each flex item allocates non-shared sample fields from that pool. - Supported flex item can have 1 input link - ``eth`` or ``udp`` - and up to 2 output links - ``ipv4`` or ``ipv6``. + and up to 3 output links - ``ipv4`` or ``ipv6``. - Flex item fields (``next_header``, ``next_protocol``, ``samples``) do not participate in RSS hash functions. - In flex item configuration, ``next_header.field_base`` value must be byte aligned (multiple of 8). + - Modify field with flex item, the offset must be byte aligned (multiple of 8). - No Tx metadata go to the E-Switch steering domain for the Flow group 0. The flows within group 0 and set metadata action are rejected by hardware. diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 613cc6face..74c5e2e371 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -761,6 +761,7 @@ enum mlx5_modification_field { MLX5_MODI_GTPU_FIRST_EXT_DW_0 = 0x76, MLX5_MODI_HASH_RESULT = 0x81, MLX5_MODI_OUT_IPV6_NEXT_HDR = 0x4A, + MLX5_MODI_INVALID = INT_MAX, }; /* Total number of metadata reg_c's. */ diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index ae2fc0aabe..d6831d849d 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -1084,6 +1084,8 @@ struct field_modify_info { uint32_t size; /* Size of field in protocol header, in bytes. */ uint32_t offset; /* Offset of field in protocol header, in bytes. */ enum mlx5_modification_field id; + uint32_t shift; + uint8_t is_flex; /* Temporary indicator for flex item modify filed WA. */ }; /* HW steering flow attributes. */ @@ -1248,6 +1250,7 @@ struct rte_flow_actions_template { uint16_t mhdr_off; /* Offset of DR modify header action. */ uint32_t refcnt; /* Reference counter. */ uint16_t rx_cpy_pos; /* Action position of Rx metadata to be copied. */ + uint8_t flex_item; /* flex item index. */ }; /* Jump action struct. */ diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 9e7ab08b32..8355249ce5 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -414,10 +414,15 @@ flow_dv_convert_modify_action(struct rte_flow_item *item, ++field; continue; } - /* Deduce actual data width in bits from mask value. */ - off_b = rte_bsf32(mask) + carry_b; - size_b = sizeof(uint32_t) * CHAR_BIT - - off_b - __builtin_clz(mask); + if (type == MLX5_MODIFICATION_TYPE_COPY && field->is_flex) { + off_b = 32 - field->shift + carry_b - field->size * CHAR_BIT; + size_b = field->size * CHAR_BIT - carry_b; + } else { + /* Deduce actual data width in bits from mask value. */ + off_b = rte_bsf32(mask) + carry_b; + size_b = sizeof(uint32_t) * CHAR_BIT - + off_b - __builtin_clz(mask); + } MLX5_ASSERT(size_b); actions[i] = (struct mlx5_modification_cmd) { .action_type = type, @@ -437,40 +442,46 @@ flow_dv_convert_modify_action(struct rte_flow_item *item, * Destination field overflow. Copy leftovers of * a source field to the next destination field. */ - carry_b = 0; if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) && dcopy->size != 0) { actions[i].length = dcopy->size * CHAR_BIT - dcopy->offset; - carry_b = actions[i].length; + carry_b += actions[i].length; next_field = false; + } else { + carry_b = 0; } /* * Not enough bits in a source filed to fill a * destination field. Switch to the next source. */ if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) && - (size_b == field->size * CHAR_BIT - off_b)) { - actions[i].length = - field->size * CHAR_BIT - off_b; + ((size_b == field->size * CHAR_BIT - off_b) || + field->is_flex)) { + actions[i].length = size_b; dcopy->offset += actions[i].length; next_dcopy = false; } - if (next_dcopy) - ++dcopy; } else { MLX5_ASSERT(item->spec); data = flow_dv_fetch_field((const uint8_t *)item->spec + field->offset, field->size); /* Shift out the trailing masked bits from data. */ data = (data & mask) >> off_b; + if (field->is_flex) + actions[i].offset = 32 - field->shift - field->size * CHAR_BIT; actions[i].data1 = rte_cpu_to_be_32(data); } /* Convert entire record to expected big-endian format. */ actions[i].data0 = rte_cpu_to_be_32(actions[i].data0); + if ((type != MLX5_MODIFICATION_TYPE_COPY || + dcopy->id != (enum mlx5_modification_field)UINT32_MAX) && + field->id != (enum mlx5_modification_field)UINT32_MAX) + ++i; + if (next_dcopy && type == MLX5_MODIFICATION_TYPE_COPY) + ++dcopy; if (next_field) ++field; - ++i; } while (field->size); if (resource->actions_num == i) return rte_flow_error_set(error, EINVAL, @@ -1422,6 +1433,131 @@ flow_modify_info_mask_32_masked(uint32_t length, uint32_t off, uint32_t post_mas return rte_cpu_to_be_32(mask & post_mask); } +static void +mlx5_modify_flex_item(const struct rte_eth_dev *dev, + const struct mlx5_flex_item *flex, + const struct rte_flow_action_modify_data *data, + struct field_modify_info *info, + uint32_t *mask, uint32_t width) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_hca_flex_attr *attr = &priv->sh->cdev->config.hca_attr.flex; + uint32_t i, j; + int id = 0; + uint32_t pos = 0; + const struct mlx5_flex_pattern_field *map; + uint32_t offset = data->offset; + uint32_t width_left = width; + uint32_t def; + uint32_t cur_width = 0; + uint32_t tmp_ofs; + uint32_t idx = 0; + struct field_modify_info tmp; + int tmp_id; + + if (!attr->ext_sample_id) { + DRV_LOG(ERR, "FW doesn't support modify field with flex item."); + return; + } + /* + * search for the mapping instance until Accumulated width is no + * less than data->offset. + */ + for (i = 0; i < flex->mapnum; i++) { + if (flex->map[i].width + pos > data->offset) + break; + pos += flex->map[i].width; + } + if (i >= flex->mapnum) + return; + tmp_ofs = pos < data->offset ? data->offset - pos : 0; + for (j = i; i < flex->mapnum && width_left > 0; ) { + map = flex->map + i; + id = mlx5_flex_get_sample_id(flex, i, &pos, false, &def); + if (id == -1) { + i++; + /* All left length is dummy */ + if (pos >= data->offset + width) + return; + cur_width = map->width; + /* One mapping instance covers the whole width. */ + } else if (pos + map->width >= (data->offset + width)) { + cur_width = width_left; + } else { + cur_width = cur_width + map->width - tmp_ofs; + pos += map->width; + /* + * Continue to search next until: + * 1. Another flex parser ID. + * 2. Width has been covered. + */ + for (j = i + 1; j < flex->mapnum; j++) { + tmp_id = mlx5_flex_get_sample_id(flex, j, &pos, false, &def); + if (tmp_id == -1) { + i = j; + pos -= flex->map[j].width; + break; + } + if (id >= (int)flex->devx_fp->num_samples || + id >= MLX5_GRAPH_NODE_SAMPLE_NUM || + tmp_id >= (int)flex->devx_fp->num_samples || + tmp_id >= MLX5_GRAPH_NODE_SAMPLE_NUM) + return; + if (flex->devx_fp->sample_ids[id].id != + flex->devx_fp->sample_ids[tmp_id].id || + flex->map[j].shift != flex->map[j - 1].width + + flex->map[j - 1].shift) { + i = j; + break; + } + if ((pos + flex->map[j].width) >= (data->offset + width)) { + cur_width = width_left; + break; + } + pos += flex->map[j].width; + cur_width += flex->map[j].width; + } + } + if (cur_width > width_left) + cur_width = width_left; + else if (cur_width < width_left && (j == flex->mapnum || i == flex->mapnum)) + return; + + MLX5_ASSERT(id < (int)flex->devx_fp->num_samples); + if (id >= (int)flex->devx_fp->num_samples || id >= MLX5_GRAPH_NODE_SAMPLE_NUM) + return; + /* Use invalid entry as placeholder for DUMMY mapping. */ + info[idx] = (struct field_modify_info){cur_width / CHAR_BIT, offset / CHAR_BIT, + id == -1 ? MLX5_MODI_INVALID : + (enum mlx5_modification_field) + flex->devx_fp->sample_ids[id].modify_field_id, + map->shift + tmp_ofs, 1}; + offset += cur_width; + width_left -= cur_width; + if (!mask) { + info[idx].offset = (32 - cur_width - map->shift - tmp_ofs); + info[idx].size = cur_width / CHAR_BIT + info[idx].offset / CHAR_BIT; + } + cur_width = 0; + tmp_ofs = 0; + idx++; + } + if (unlikely(width_left > 0)) { + MLX5_ASSERT(false); + return; + } + if (mask) + memset(mask, 0xff, data->offset / CHAR_BIT + width / CHAR_BIT); + /* Re-order the info to follow IPv6 address. */ + for (i = 0; i < idx / 2; i++) { + tmp = info[i]; + MLX5_ASSERT(info[i].id); + MLX5_ASSERT(info[idx - 1 - i].id); + info[i] = info[idx - 1 - i]; + info[idx - 1 - i] = tmp; + } +} + void mlx5_flow_field_id_to_modify_info (const struct rte_flow_action_modify_data *data, @@ -1893,6 +2029,11 @@ mlx5_flow_field_id_to_modify_info else info[idx].offset = off_be; break; + case RTE_FLOW_FIELD_FLEX_ITEM: + MLX5_ASSERT(data->flex_handle != NULL && !(data->offset & 0x7)); + mlx5_modify_flex_item(dev, (const struct mlx5_flex_item *)data->flex_handle, + data, info, mask, width); + break; case RTE_FLOW_FIELD_POINTER: case RTE_FLOW_FIELD_VALUE: default: diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 1066829ca5..907aab8bf3 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -4562,6 +4562,17 @@ flow_hw_actions_template_create(struct rte_eth_dev *dev, at->actions[i].conf = actions->conf; at->masks[i].conf = masks->conf; } + if (actions->type == RTE_FLOW_ACTION_TYPE_MODIFY_FIELD) { + const struct rte_flow_action_modify_field *info = actions->conf; + + if ((info->dst.field == RTE_FLOW_FIELD_FLEX_ITEM && + flow_hw_flex_item_acquire(dev, info->dst.flex_handle, + &at->flex_item)) || + (info->src.field == RTE_FLOW_FIELD_FLEX_ITEM && + flow_hw_flex_item_acquire(dev, info->src.flex_handle, + &at->flex_item))) + goto error; + } } at->tmpl = flow_hw_dr_actions_template_create(at); if (!at->tmpl) @@ -4593,7 +4604,7 @@ flow_hw_actions_template_create(struct rte_eth_dev *dev, * 0 on success, a negative errno value otherwise and rte_errno is set. */ static int -flow_hw_actions_template_destroy(struct rte_eth_dev *dev __rte_unused, +flow_hw_actions_template_destroy(struct rte_eth_dev *dev, struct rte_flow_actions_template *template, struct rte_flow_error *error __rte_unused) { @@ -4606,6 +4617,7 @@ flow_hw_actions_template_destroy(struct rte_eth_dev *dev __rte_unused, "action template in using"); } LIST_REMOVE(template, next); + flow_hw_flex_item_release(dev, &template->flex_item); if (template->tmpl) mlx5dr_action_template_destroy(template->tmpl); mlx5_free(template); -- 2.27.0