From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 896D041DB5; Thu, 2 Mar 2023 14:06:51 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0DBB142D31; Thu, 2 Mar 2023 14:06:16 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 5B99B42BDA for ; Thu, 2 Mar 2023 14:06:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677762374; x=1709298374; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NWy5R1+owBceCdjVoSOyddf1L7htaU4wPF3JPgQbMzw=; b=enlSBSo0XfkRUJbslhPuJrx+LEVugkT8qK/6M/8S0xObakFrM6NhX7Hk WzOn24Hg/pdR/AvLdm2lazvRYSMgqcz6INSkwiznMObP5IyIcjIpHdI4F tF5XcZZMZbrV9d/7bw2GatuGC1B0UDtRa6mnhPI60j3MZ8C5qwT/Kkp0T 82mZxJjXzaygWkFQNjEiTGqpdcKh6x/U9I1xnKnYy/nJ4Qen5xxuKgqmu paI1gEH/iOEuBTYyXsR7pD366KQ22yZwYRs9P/VjzDllm4ZX9cuqveYOP B1GGBRChpQK61jQnNbqO/NGOodlTckWqxl81Th7/q4eZllmgYYpfQk8Kt g==; X-IronPort-AV: E=McAfee;i="6500,9779,10636"; a="322988171" X-IronPort-AV: E=Sophos;i="5.98,227,1673942400"; d="scan'208";a="322988171" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2023 05:06:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10636"; a="707406383" X-IronPort-AV: E=Sophos;i="5.98,227,1673942400"; d="scan'208";a="707406383" Received: from dpdk-mingxial-ice.sh.intel.com ([10.67.110.191]) by orsmga001.jf.intel.com with ESMTP; 02 Mar 2023 05:06:12 -0800 From: Mingxia Liu To: dev@dpdk.org, beilei.xing@intel.com, yuying.zhang@intel.com Cc: Mingxia Liu Subject: [PATCH v9 06/21] net/cpfl: support queue stop Date: Thu, 2 Mar 2023 21:20:42 +0000 Message-Id: <20230302212057.1114863-7-mingxia.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230302212057.1114863-1-mingxia.liu@intel.com> References: <20230302103527.931071-1-mingxia.liu@intel.com> <20230302212057.1114863-1-mingxia.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support for these device ops: - rx_queue_stop - tx_queue_stop Signed-off-by: Mingxia Liu --- drivers/net/cpfl/cpfl_ethdev.c | 10 +++- drivers/net/cpfl/cpfl_rxtx.c | 98 ++++++++++++++++++++++++++++++++++ drivers/net/cpfl/cpfl_rxtx.h | 3 ++ 3 files changed, 110 insertions(+), 1 deletion(-) diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c index 02a771638e..9aa95c1bb3 100644 --- a/drivers/net/cpfl/cpfl_ethdev.c +++ b/drivers/net/cpfl/cpfl_ethdev.c @@ -229,12 +229,16 @@ cpfl_dev_start(struct rte_eth_dev *dev) ret = idpf_vc_vport_ena_dis(vport, true); if (ret != 0) { PMD_DRV_LOG(ERR, "Failed to enable vport"); - return ret; + goto err_vport; } vport->stopped = 0; return 0; + +err_vport: + cpfl_stop_queues(dev); + return ret; } static int @@ -247,6 +251,8 @@ cpfl_dev_stop(struct rte_eth_dev *dev) idpf_vc_vport_ena_dis(vport, false); + cpfl_stop_queues(dev); + vport->stopped = 1; return 0; @@ -281,6 +287,8 @@ static const struct eth_dev_ops cpfl_eth_dev_ops = { .link_update = cpfl_dev_link_update, .rx_queue_start = cpfl_rx_queue_start, .tx_queue_start = cpfl_tx_queue_start, + .rx_queue_stop = cpfl_rx_queue_stop, + .tx_queue_stop = cpfl_tx_queue_stop, .dev_supported_ptypes_get = cpfl_dev_supported_ptypes_get, }; diff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c index c13166b63c..08db01412e 100644 --- a/drivers/net/cpfl/cpfl_rxtx.c +++ b/drivers/net/cpfl/cpfl_rxtx.c @@ -49,6 +49,14 @@ cpfl_tx_offload_convert(uint64_t offload) return ol; } +static const struct idpf_rxq_ops def_rxq_ops = { + .release_mbufs = idpf_qc_rxq_mbufs_release, +}; + +static const struct idpf_txq_ops def_txq_ops = { + .release_mbufs = idpf_qc_txq_mbufs_release, +}; + static const struct rte_memzone * cpfl_dma_zone_reserve(struct rte_eth_dev *dev, uint16_t queue_idx, uint16_t len, uint16_t queue_type, @@ -177,6 +185,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq, idpf_qc_split_rx_bufq_reset(bufq); bufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start + queue_idx * vport->chunks_info.rx_buf_qtail_spacing); + bufq->ops = &def_rxq_ops; bufq->q_set = true; if (bufq_id == IDPF_RX_SPLIT_BUFQ1_ID) { @@ -287,6 +296,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, idpf_qc_single_rx_queue_reset(rxq); rxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start + queue_idx * vport->chunks_info.rx_qtail_spacing); + rxq->ops = &def_rxq_ops; } else { idpf_qc_split_rx_descq_reset(rxq); @@ -461,6 +471,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, txq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start + queue_idx * vport->chunks_info.tx_qtail_spacing); + txq->ops = &def_txq_ops; txq->q_set = true; dev->data->tx_queues[queue_idx] = txq; @@ -612,3 +623,90 @@ cpfl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) return err; } + +int +cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) +{ + struct idpf_vport *vport = dev->data->dev_private; + struct idpf_rx_queue *rxq; + int err; + + if (rx_queue_id >= dev->data->nb_rx_queues) + return -EINVAL; + + err = idpf_vc_queue_switch(vport, rx_queue_id, true, false); + if (err != 0) { + PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off", + rx_queue_id); + return err; + } + + rxq = dev->data->rx_queues[rx_queue_id]; + if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) { + rxq->ops->release_mbufs(rxq); + idpf_qc_single_rx_queue_reset(rxq); + } else { + rxq->bufq1->ops->release_mbufs(rxq->bufq1); + rxq->bufq2->ops->release_mbufs(rxq->bufq2); + idpf_qc_split_rx_queue_reset(rxq); + } + dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED; + + return 0; +} + +int +cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) +{ + struct idpf_vport *vport = dev->data->dev_private; + struct idpf_tx_queue *txq; + int err; + + if (tx_queue_id >= dev->data->nb_tx_queues) + return -EINVAL; + + err = idpf_vc_queue_switch(vport, tx_queue_id, false, false); + if (err != 0) { + PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off", + tx_queue_id); + return err; + } + + txq = dev->data->tx_queues[tx_queue_id]; + txq->ops->release_mbufs(txq); + if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) { + idpf_qc_single_tx_queue_reset(txq); + } else { + idpf_qc_split_tx_descq_reset(txq); + idpf_qc_split_tx_complq_reset(txq->complq); + } + dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED; + + return 0; +} + +void +cpfl_stop_queues(struct rte_eth_dev *dev) +{ + struct idpf_rx_queue *rxq; + struct idpf_tx_queue *txq; + int i; + + for (i = 0; i < dev->data->nb_rx_queues; i++) { + rxq = dev->data->rx_queues[i]; + if (rxq == NULL) + continue; + + if (cpfl_rx_queue_stop(dev, i) != 0) + PMD_DRV_LOG(WARNING, "Fail to stop Rx queue %d", i); + } + + for (i = 0; i < dev->data->nb_tx_queues; i++) { + txq = dev->data->tx_queues[i]; + if (txq == NULL) + continue; + + if (cpfl_tx_queue_stop(dev, i) != 0) + PMD_DRV_LOG(WARNING, "Fail to stop Tx queue %d", i); + } +} diff --git a/drivers/net/cpfl/cpfl_rxtx.h b/drivers/net/cpfl/cpfl_rxtx.h index 716b2fefa4..e9b810deaa 100644 --- a/drivers/net/cpfl/cpfl_rxtx.h +++ b/drivers/net/cpfl/cpfl_rxtx.h @@ -32,4 +32,7 @@ int cpfl_rx_queue_init(struct rte_eth_dev *dev, uint16_t rx_queue_id); int cpfl_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id); int cpfl_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id); int cpfl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id); +void cpfl_stop_queues(struct rte_eth_dev *dev); +int cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id); +int cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id); #endif /* _CPFL_RXTX_H_ */ -- 2.34.1