From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6DB1441E06; Tue, 7 Mar 2023 18:17:46 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3A988410DD; Tue, 7 Mar 2023 18:17:42 +0100 (CET) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id DFB764067B for ; Tue, 7 Mar 2023 18:17:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678209460; x=1709745460; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/TOM4H6bsqVo3/Zd8kMRZ+GhSdPDAuHcTIRStt9bVJ4=; b=WlSan9HWY/Tewa9uKb0DFI3qKw0OmGOqg7T9hvp36yHlQiRj3fHaKJRN rJnBR8YQxuPWzbMWIgeM5EQXWkQnBXirsuhRJrK9XtfmDkbFnZi3fDJ88 YCFxO0N0X2vlQ18NkkdRrBjD0sAKM7CygVByvnP93Zd7CGykICksduDQU Vv8N8ed766EOaAj6+huOlPkExpSWA+qPovkH774cOnAJrmYznaZoKk2LM pQQ1uZ0P/ovOFGnxHEljwxKVxF/GVmiMT6seYNkxOW8GfJUkjfS7zGB8M vz68NRsIgqvBovEd8/oYxeZCGsjger+2176KcU8XrOsr0oy1wQ02DGP1m A==; X-IronPort-AV: E=McAfee;i="6500,9779,10642"; a="316312320" X-IronPort-AV: E=Sophos;i="5.98,241,1673942400"; d="scan'208";a="316312320" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2023 09:17:39 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10642"; a="676618798" X-IronPort-AV: E=Sophos;i="5.98,241,1673942400"; d="scan'208";a="676618798" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.80]) by orsmga002.jf.intel.com with ESMTP; 07 Mar 2023 09:17:37 -0800 From: Ciara Power To: dev@dpdk.org Cc: kai.ji@intel.com, Ciara Power , Akhil Goyal , Fan Zhang Subject: [PATCH 1/3] test/crypto: fix skip condition for CPU crypto SGL Date: Tue, 7 Mar 2023 17:17:32 +0000 Message-Id: <20230307171734.2872005-2-ciara.power@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230307171734.2872005-1-ciara.power@intel.com> References: <20230307171734.2872005-1-ciara.power@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When SGL support was added to AESNI_MB PMD, the feature flag was enabled. This meant SGL testcases were incorrectly running for the cryptodev_cpu_aesni_mb_autotest, and SGL support was not added for CPU crypto. Now skipping the ZUC auth cipher SGL tests for CPU crypto, and GCM authenticated encryption SGL tests for CPU crypto on AESNI_MB only, as AESNI_GCM CPU crypto supports inplace SGL. Fixes: f9dfb59edbcc ("crypto/ipsec_mb: support remaining SGL") Signed-off-by: Ciara Power --- app/test/test_cryptodev.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c index aa831d79a2..b7c01a1663 100644 --- a/app/test/test_cryptodev.c +++ b/app/test/test_cryptodev.c @@ -6537,6 +6537,9 @@ test_zuc_auth_cipher_sgl(const struct wireless_test_data *tdata, tdata->digest.len) < 0) return TEST_SKIPPED; + if (gbl_action_type == RTE_SECURITY_ACTION_TYPE_CPU_CRYPTO) + return TEST_SKIPPED; + rte_cryptodev_info_get(ts_params->valid_devs[0], &dev_info); uint64_t feat_flags = dev_info.feature_flags; @@ -7896,6 +7899,9 @@ test_mixed_auth_cipher_sgl(const struct mixed_cipher_auth_test_data *tdata, } } + if (gbl_action_type == RTE_SECURITY_ACTION_TYPE_CPU_CRYPTO) + return TEST_SKIPPED; + /* Create the session */ if (verify) retval = create_wireless_algo_cipher_auth_session( @@ -14719,8 +14725,13 @@ test_authenticated_encryption_SGL(const struct aead_test_data *tdata, &cap_idx) == NULL) return TEST_SKIPPED; - /* OOP not supported with CPU crypto */ - if (oop && gbl_action_type == RTE_SECURITY_ACTION_TYPE_CPU_CRYPTO) + /* + * SGL not supported on AESNI_MB PMD CPU crypto, + * OOP not supported on AESNI_GCM CPU crypto + */ + if (gbl_action_type == RTE_SECURITY_ACTION_TYPE_CPU_CRYPTO && + (gbl_driver_id == rte_cryptodev_driver_id_get( + RTE_STR(CRYPTODEV_NAME_AESNI_MB_PMD)) || oop)) return TEST_SKIPPED; /* Detailed check for the particular SGL support flag */ -- 2.25.1