[PATCH 1/2] net/cnxk: optimize flow control hysteresis

[PATCH 1/2] net/cnxk: optimize flow control hysteresis

[pbhagavatula]

From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Set flow control hysteresis to ignore immediate sequence of
decrement-increment to avoid unnecessary LLC traffic.
Enable hysteresis when SQ length is more than 512 as it lower
queue lengths will require faster updates.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
---
 drivers/net/cnxk/cnxk_ethdev.c | 2 ++
 drivers/net/cnxk/cnxk_ethdev.h | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 1cae3084e1..42a52ed0ca 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -487,6 +487,8 @@ cnxk_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,
 	sq->qid = qid;
 	sq->nb_desc = nb_desc;
 	sq->max_sqe_sz = nix_sq_max_sqe_sz(dev);
+	if (sq->nb_desc >= CNXK_NIX_DEF_SQ_COUNT)
+		sq->fc_hyst_bits = 0x1;
 
 	if (nix->tx_compl_ena) {
 		sq->cqid = sq->qid + dev->nb_rxq;
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 62a06e5d03..97537de17a 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -49,6 +49,8 @@
 /* LPB & SPB */
 #define CNXK_NIX_NUM_POOLS_MAX 2
 
+#define CNXK_NIX_DEF_SQ_COUNT	512
+
 #define CNXK_NIX_RSS_L3_L4_SRC_DST                                             \
 	(RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY |                   \
 	 RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)
-- 
2.25.1

[PATCH 2/2] event/cnxk: restrict stashing to multi-core

[pbhagavatula]

From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Enable WQE stashing by default only when multiple event ports are
enabled.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 drivers/event/cnxk/cn10k_eventdev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
index 071ea5a212..49d205af39 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -902,7 +902,7 @@ cn10k_sso_rx_adapter_queue_add(
 	lookup_mem = rxq->lookup_mem;
 	cn10k_sso_set_priv_mem(event_dev, lookup_mem);
 	cn10k_sso_fp_fns_set((struct rte_eventdev *)(uintptr_t)event_dev);
-	if (roc_feature_sso_has_stash()) {
+	if (roc_feature_sso_has_stash() && dev->nb_event_ports > 1) {
 		stash.hwgrp = queue_conf->ev.queue_id;
 		stash.stash_offset = CN10K_SSO_DEFAULT_STASH_OFFSET;
 		stash.stash_count = CN10K_SSO_DEFAULT_STASH_LENGTH;
-- 
2.25.1

Re: [PATCH 1/2] net/cnxk: optimize flow control hysteresis

[Jerin Jacob]

On Tue, Apr 11, 2023 at 12:31 PM <pbhagavatula@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Set flow control hysteresis to ignore immediate sequence of
> decrement-increment to avoid unnecessary LLC traffic.
> Enable hysteresis when SQ length is more than 512 as it lower
> queue lengths will require faster updates.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>

Series applied to dpdk-next-net-mrvl/for-next-net. Thanks


> Signed-off-by: Satha Rao <skoteshwar@marvell.com>
> ---
>  drivers/net/cnxk/cnxk_ethdev.c | 2 ++
>  drivers/net/cnxk/cnxk_ethdev.h | 2 ++
>  2 files changed, 4 insertions(+)
>
> diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
> index 1cae3084e1..42a52ed0ca 100644
> --- a/drivers/net/cnxk/cnxk_ethdev.c
> +++ b/drivers/net/cnxk/cnxk_ethdev.c
> @@ -487,6 +487,8 @@ cnxk_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,
>         sq->qid = qid;
>         sq->nb_desc = nb_desc;
>         sq->max_sqe_sz = nix_sq_max_sqe_sz(dev);
> +       if (sq->nb_desc >= CNXK_NIX_DEF_SQ_COUNT)
> +               sq->fc_hyst_bits = 0x1;
>
>         if (nix->tx_compl_ena) {
>                 sq->cqid = sq->qid + dev->nb_rxq;
> diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
> index 62a06e5d03..97537de17a 100644
> --- a/drivers/net/cnxk/cnxk_ethdev.h
> +++ b/drivers/net/cnxk/cnxk_ethdev.h
> @@ -49,6 +49,8 @@
>  /* LPB & SPB */
>  #define CNXK_NIX_NUM_POOLS_MAX 2
>
> +#define CNXK_NIX_DEF_SQ_COUNT  512
> +
>  #define CNXK_NIX_RSS_L3_L4_SRC_DST                                             \
>         (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY |                   \
>          RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)
> --
> 2.25.1
>