From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EEF954293E; Fri, 14 Apr 2023 10:44:19 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C5DC540144; Fri, 14 Apr 2023 10:44:19 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id C5D27400D5 for ; Fri, 14 Apr 2023 10:44:17 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33E3K7EF013697; Fri, 14 Apr 2023 01:44:16 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=yxIx1i3G81INS8w54Ah6a7qwTf8IuP/18UXeDJGoEHQ=; b=YPzJZ8vYu6sONKepRWyJJRidw/RrWLOXNJoM8yRTbXvh9tun/A2fOMAeZ94IrlF0nY86 vTyfpOtBoE76jJWICi59bvJQlSXbnxXOyDBWHdIOHE74yMvPbzqcWE1vRPA/PwApa5Mq Xso+YivQTCIRhuBn1V6LpOFa9C9k7Fhd52gYC6ULjmMdGdlGroUIe/C06VKdrk6KRCJI 3qUX63d0RXasZz4M2NraOa3PXSAP3UbxIev3I9EI0JD6vu1GrAMyQjfqvNMijOfsyzkl 2pJckWVIn1xGqts6dvRZs6d4V073LgNUt4u8yN/wqc2VD5iQyFMFsn45iSZ6QG8l/Xfy Gg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pxxu899e9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 14 Apr 2023 01:44:16 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 14 Apr 2023 01:44:15 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 14 Apr 2023 01:44:15 -0700 Received: from cavium-DT10.. (unknown [10.28.34.39]) by maili.marvell.com (Postfix) with ESMTP id 4D6473F7075; Fri, 14 Apr 2023 01:44:13 -0700 (PDT) From: Volodymyr Fialko To: , Reshma Pattan CC: , , Volodymyr Fialko Subject: [PATCH] reorder: improve buffer structure layout Date: Fri, 14 Apr 2023 10:43:43 +0200 Message-ID: <20230414084344.271602-1-vfialko@marvell.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: e8GB3YvpzAq2HNUi5dj32atnWzcQpjFf X-Proofpoint-GUID: e8GB3YvpzAq2HNUi5dj32atnWzcQpjFf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-14_03,2023-04-13_01,2023-02-09_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Rearrange the reorder buffer structure to prevent padding to extra one cache line. Current layout: struct rte_reorder_buffer { char name[RTE_REORDER_NAMESIZE]; uint32_t min_seqn; unsigned int memsize; // -> padding to cache align (cir_buffer is also cache aligned) struct cir_buffer ready_buf; struct cir_buffer order_buf; int is_initialized; // -> padding to cache align, eat whole line }; New layout: struct rte_reorder_buffer { char name[RTE_REORDER_NAMESIZE]; uint32_t min_seqn; unsigned int memsize; int is_initialized; // -> padding to cache align (cir_buffer is also cache aligned) struct cir_buffer ready_buf; struct cir_buffer order_buf; // -> no padding }; Signed-off-by: Volodymyr Fialko --- lib/reorder/rte_reorder.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/reorder/rte_reorder.c b/lib/reorder/rte_reorder.c index f55f383700..7418202b04 100644 --- a/lib/reorder/rte_reorder.c +++ b/lib/reorder/rte_reorder.c @@ -46,9 +46,10 @@ struct rte_reorder_buffer { char name[RTE_REORDER_NAMESIZE]; uint32_t min_seqn; /**< Lowest seq. number that can be in the buffer */ unsigned int memsize; /**< memory area size of reorder buffer */ + int is_initialized; /**< flag indicates that buffer was initialized */ + struct cir_buffer ready_buf; /**< temp buffer for dequeued entries */ struct cir_buffer order_buf; /**< buffer used to reorder entries */ - int is_initialized; } __rte_cache_aligned; static void -- 2.34.1