* [PATCH] net/ice: adjust timestamp mbuf register
@ 2023-05-19 7:08 Wenjing Qiao
2023-05-19 7:12 ` [PATCH v2] " Wenjing Qiao
0 siblings, 1 reply; 3+ messages in thread
From: Wenjing Qiao @ 2023-05-19 7:08 UTC (permalink / raw)
To: qiming.yang, qi.z.zhang; +Cc: dev, Wenjing Qiao, stable
Due to only support timestamp at port level, adjust
timestamp mbuf register to dev config.
Fixes: 953e74e6b73a ("net/ice: enable Rx timestamp on flex descriptor")
Cc: stable@intel.com
Signed-off-by: Wenjing Qiao <wenjing.qiao@intel.com>
---
drivers/net/ice/ice_ethdev.c | 10 ++++++++++
drivers/net/ice/ice_rxtx.c | 5 ++++-
drivers/net/ice/ice_rxtx.h | 1 +
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 8b4cd40c43..9e647cedf9 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -3691,6 +3691,16 @@ ice_dev_start(struct rte_eth_dev *dev)
}
}
+ if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) {
+ /* Register mbuf field and flag for Rx timestamp */
+ ret = rte_mbuf_dyn_rx_timestamp_register(&ice_timestamp_dynfield_offset,
+ &ice_timestamp_dynflag);
+ if (ret) {
+ PMD_DRV_LOG(ERR, "Cannot register mbuf field/flag for timestamp");
+ goto tx_err;
+ }
+ }
+
/* program Rx queues' context in hardware*/
for (nb_rxq = 0; nb_rxq < data->nb_rx_queues; nb_rxq++) {
ret = ice_rx_queue_start(dev, nb_rxq);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 560c1a4af7..c998b0080a 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -274,7 +274,7 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq)
return -EINVAL;
}
- if (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) {
+ if (!rxq->ts_enable && (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP)) {
/* Register mbuf field and flag for Rx timestamp */
err = rte_mbuf_dyn_rx_timestamp_register(
&ice_timestamp_dynfield_offset,
@@ -284,6 +284,7 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq)
"Cannot register mbuf field/flag for timestamp");
return -EINVAL;
}
+ rxq->ts_enable = true;
}
memset(&rx_ctx, 0, sizeof(rx_ctx));
@@ -671,6 +672,8 @@ ice_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
return -EINVAL;
}
+ if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP)
+ rxq->ts_enable = true;
err = ice_program_hw_rx_queue(rxq);
if (err) {
PMD_DRV_LOG(ERR, "fail to program RX queue %u",
diff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h
index 89569029e1..268289716e 100644
--- a/drivers/net/ice/ice_rxtx.h
+++ b/drivers/net/ice/ice_rxtx.h
@@ -120,6 +120,7 @@ struct ice_rx_queue {
uint64_t hw_time_update; /* SW time of HW record updating */
struct rte_eth_rxseg_split rxseg[ICE_RX_MAX_NSEG];
uint32_t rxseg_nb;
+ bool ts_enable; /* if rxq timestamp is enabled */
};
struct ice_tx_entry {
--
2.25.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v2] net/ice: adjust timestamp mbuf register
2023-05-19 7:08 [PATCH] net/ice: adjust timestamp mbuf register Wenjing Qiao
@ 2023-05-19 7:12 ` Wenjing Qiao
2023-05-24 1:27 ` Zhang, Qi Z
0 siblings, 1 reply; 3+ messages in thread
From: Wenjing Qiao @ 2023-05-19 7:12 UTC (permalink / raw)
To: qiming.yang, qi.z.zhang; +Cc: dev, Wenjing Qiao, stable
Due to only support timestamp at port level, adjust
timestamp mbuf register to dev config.
Fixes: 953e74e6b73a ("net/ice: enable Rx timestamp on flex descriptor")
Cc: stable@dpdk.org
Signed-off-by: Wenjing Qiao <wenjing.qiao@intel.com>
---
drivers/net/ice/ice_ethdev.c | 10 ++++++++++
drivers/net/ice/ice_rxtx.c | 5 ++++-
drivers/net/ice/ice_rxtx.h | 1 +
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 8b4cd40c43..9e647cedf9 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -3691,6 +3691,16 @@ ice_dev_start(struct rte_eth_dev *dev)
}
}
+ if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) {
+ /* Register mbuf field and flag for Rx timestamp */
+ ret = rte_mbuf_dyn_rx_timestamp_register(&ice_timestamp_dynfield_offset,
+ &ice_timestamp_dynflag);
+ if (ret) {
+ PMD_DRV_LOG(ERR, "Cannot register mbuf field/flag for timestamp");
+ goto tx_err;
+ }
+ }
+
/* program Rx queues' context in hardware*/
for (nb_rxq = 0; nb_rxq < data->nb_rx_queues; nb_rxq++) {
ret = ice_rx_queue_start(dev, nb_rxq);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 560c1a4af7..c998b0080a 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -274,7 +274,7 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq)
return -EINVAL;
}
- if (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) {
+ if (!rxq->ts_enable && (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP)) {
/* Register mbuf field and flag for Rx timestamp */
err = rte_mbuf_dyn_rx_timestamp_register(
&ice_timestamp_dynfield_offset,
@@ -284,6 +284,7 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq)
"Cannot register mbuf field/flag for timestamp");
return -EINVAL;
}
+ rxq->ts_enable = true;
}
memset(&rx_ctx, 0, sizeof(rx_ctx));
@@ -671,6 +672,8 @@ ice_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
return -EINVAL;
}
+ if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP)
+ rxq->ts_enable = true;
err = ice_program_hw_rx_queue(rxq);
if (err) {
PMD_DRV_LOG(ERR, "fail to program RX queue %u",
diff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h
index 89569029e1..268289716e 100644
--- a/drivers/net/ice/ice_rxtx.h
+++ b/drivers/net/ice/ice_rxtx.h
@@ -120,6 +120,7 @@ struct ice_rx_queue {
uint64_t hw_time_update; /* SW time of HW record updating */
struct rte_eth_rxseg_split rxseg[ICE_RX_MAX_NSEG];
uint32_t rxseg_nb;
+ bool ts_enable; /* if rxq timestamp is enabled */
};
struct ice_tx_entry {
--
2.25.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH v2] net/ice: adjust timestamp mbuf register
2023-05-19 7:12 ` [PATCH v2] " Wenjing Qiao
@ 2023-05-24 1:27 ` Zhang, Qi Z
0 siblings, 0 replies; 3+ messages in thread
From: Zhang, Qi Z @ 2023-05-24 1:27 UTC (permalink / raw)
To: Qiao, Wenjing, Yang, Qiming; +Cc: dev, stable
> -----Original Message-----
> From: Qiao, Wenjing <wenjing.qiao@intel.com>
> Sent: Friday, May 19, 2023 3:12 PM
> To: Yang, Qiming <qiming.yang@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>
> Cc: dev@dpdk.org; Qiao, Wenjing <wenjing.qiao@intel.com>;
> stable@dpdk.org
> Subject: [PATCH v2] net/ice: adjust timestamp mbuf register
>
> Due to only support timestamp at port level, adjust timestamp mbuf register
> to dev config.
>
> Fixes: 953e74e6b73a ("net/ice: enable Rx timestamp on flex descriptor")
> Cc: stable@dpdk.org
>
> Signed-off-by: Wenjing Qiao <wenjing.qiao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Applied to dpdk-next-net-intel.
Thanks
Qi
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-05-24 1:27 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2023-05-19 7:12 ` [PATCH v2] " Wenjing Qiao
2023-05-24 1:27 ` Zhang, Qi Z
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