From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124])
	by inbox.dpdk.org (Postfix) with ESMTP id B8DD742B9A;
	Thu, 25 May 2023 12:09:25 +0200 (CEST)
Received: from mails.dpdk.org (localhost [127.0.0.1])
	by mails.dpdk.org (Postfix) with ESMTP id 7F13E42D46;
	Thu, 25 May 2023 12:09:07 +0200 (CEST)
Received: from NAM04-MW2-obe.outbound.protection.outlook.com
 (mail-mw2nam04on2083.outbound.protection.outlook.com [40.107.101.83])
 by mails.dpdk.org (Postfix) with ESMTP id 3CD4B42D36
 for <dev@dpdk.org>; Thu, 25 May 2023 12:09:04 +0200 (CEST)
ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;
 b=jSNkClhjGyLQ0U1Bky8GUw9Bkxs2vNdZo1i8VesAK19gOe07KTVqsddPcZiUoVgWW49NjEhsSvcg/7fhgKlsbHLXJV3LyFZ5tuMV0+J+34TZhKRDS2cDrpGibW/4C2Ua6isfSQzf4JGmOnLoHUvuIBea3sML0kMmrkbRpvjSRpbXZ2bH2DnkurKKfPfOkA04wYIUIy0XHEqrptCD1t3jS/P6sf7R39rcXEJtf5369HpYl8WgGQ3BR1x38PBDp/7l9FnQ4UXEiXcIQ/+1u1JYIGtDdxG26tMQEIwmJAQx6N8wP+J1EtZSQERSqM+8etvrFFnlICmfEBkwhqDR7RzWcA==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; 
 s=arcselector9901;
 h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;
 bh=s1ucNisiGuVGHCbkJm3c91oMB4dvFp51Ge+bn1nKsoU=;
 b=fRJ5fbbb+Zn5EhM1HwF0fsmQtlw2uuSxOTkSfIAaL1XlOv7UjXtp9GrGRZiYws03JpsKPaDqRq8jHXBmoU0/nbgsU8l2eMBeJClathUok9e3flRS9Bp/uij6XSmthgvqi69Z2H+UD4pDu9ARVY2RYAn27BaBj0xZDUOVV2j9jwbZ/jU596EorpzrLKQPSzlZnJJUJ1Lg/3MajgE1Wx2SiGbj637KTSHm+OD1usEPHQHEXC89WZfkWxlQ0MGhpSvvB6/EE80tDgh0TkAcS/hjQTMOGsjfEmInUmXLSAiWaQF3Kr9lBXrB7yvrfvjOCL3B0fxwcvL9x0U/tovFHov7iQ==
ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is
 165.204.84.17) smtp.rcpttodomain=dpdk.org smtp.mailfrom=amd.com; dmarc=pass
 (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com;
 dkim=none (message not signed); arc=none
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; 
 h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;
 bh=s1ucNisiGuVGHCbkJm3c91oMB4dvFp51Ge+bn1nKsoU=;
 b=OWjN3siKTPvt9x3t8GC2IVypmfsx6eOUIBzTtE4YFi2LS/Ar13B4qME/xPMlqZzvTrWLIJPxK51P6WQg7d3nvmQqfegGHY4ZtwZCdM5mJXhKZhjOlrkSIxDqVWUXkFh8esOC4eVJE+QNOBO80a9Scd1cKOIp0sS3PmDqw1cLg/I=
Received: from MW4PR04CA0334.namprd04.prod.outlook.com (2603:10b6:303:8a::9)
 by IA1PR12MB6258.namprd12.prod.outlook.com (2603:10b6:208:3e6::17) with
 Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.28; Thu, 25 May
 2023 10:09:01 +0000
Received: from CO1NAM11FT084.eop-nam11.prod.protection.outlook.com
 (2603:10b6:303:8a:cafe::9f) by MW4PR04CA0334.outlook.office365.com
 (2603:10b6:303:8a::9) with Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6433.16 via Frontend
 Transport; Thu, 25 May 2023 10:09:01 +0000
X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17)
 smtp.mailfrom=amd.com; dkim=none (message not signed)
 header.d=none;dmarc=pass action=none header.from=amd.com;
Received-SPF: Pass (protection.outlook.com: domain of amd.com designates
 165.204.84.17 as permitted sender) receiver=protection.outlook.com;
 client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C
Received: from SATLEXMB03.amd.com (165.204.84.17) by
 CO1NAM11FT084.mail.protection.outlook.com (10.13.174.194) with Microsoft SMTP
 Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id
 15.20.6411.30 via Frontend Transport; Thu, 25 May 2023 10:09:00 +0000
Received: from SATLEXMB08.amd.com (10.181.40.132) by SATLEXMB03.amd.com
 (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 25 May
 2023 05:08:50 -0500
Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB08.amd.com
 (10.181.40.132) with Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 25 May
 2023 03:08:49 -0700
Received: from xhdipdslab41.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com
 (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via
 Frontend Transport; Thu, 25 May 2023 05:08:46 -0500
From: Nipun Gupta <nipun.gupta@amd.com>
To: <dev@dpdk.org>, <thomas@monjalon.net>, <david.marchand@redhat.com>,
 <hkalra@marvell.com>, <anatoly.burakov@intel.com>,
 <stephen@networkplumber.org>
CC: <ferruh.yigit@amd.com>, <harpreet.anand@amd.com>,
 <nikhil.agarwal@amd.com>, Nipun Gupta <nipun.gupta@amd.com>
Subject: [PATCH v5 4/5] bus/cdx: add support for MSI
Date: Thu, 25 May 2023 15:38:20 +0530
Message-ID: <20230525100821.12148-5-nipun.gupta@amd.com>
X-Mailer: git-send-email 2.17.1
In-Reply-To: <20230525100821.12148-1-nipun.gupta@amd.com>
References: <20230124140746.594066-1-nipun.gupta@amd.com>
 <20230525100821.12148-1-nipun.gupta@amd.com>
MIME-Version: 1.0
Content-Type: text/plain
X-EOPAttributedMessage: 0
X-MS-PublicTrafficType: Email
X-MS-TrafficTypeDiagnostic: CO1NAM11FT084:EE_|IA1PR12MB6258:EE_
X-MS-Office365-Filtering-Correlation-Id: 4da0018c-3ee1-468a-cd20-08db5d080fd9
X-MS-Exchange-SenderADCheck: 1
X-MS-Exchange-AntiSpam-Relay: 0
X-Microsoft-Antispam: BCL:0;
X-Microsoft-Antispam-Message-Info: uISCfpPKLI2mb4cMkNU1q+sbRCofQyGIsHvOYCdn8cPqQRallqSWI1Hr0PLyus8iFcTmCUOtwA8Y32HoFESZQSDrIZOsBFOQczyZDX5UIoRErFkjXOIHTVt3ELPhOnMEpvSeiXe9Gp0GNqEHJcbTaZ9PityVf2ucPWGZmynSXZx4hyv7hNfnaXqbE9Rg9HHv/RhibCouJSA/H7XmBcXG9QMouE5xGBJ0UVNtzI7ufHTZBcqJQJspCoGVAscjYXD/YQxMfdrAFlWDtUSfodCWriJ6n2jhbW7uVQ5jBoQPjkqJ6LuhfvQMfJI2N/FoNiTC2Vdm/LwnPmMDr401OxzJASnhPxXpN6XvjLZK0fA3bHgZ6hb2ZBm5YZVO3WQeJ1LA/MM/ySMh7+o+xjz+vETw4fSk8CZEDQbAZQOs8KVxSzjJlH6x4nnvzvhKKCuy+/FVnBD00Bz/++oK7CNc4hILU2SzkxNmqmWb+YpY3X+16k8piGGDBGTuOP1YSA7lIC6VvzeVA9IylGZKymldq/4W86JdcemLpyDaSSOY18CYyacCKN0ciwetEEWozYqTlWfhANvgfRZigVCSsEklvQRARji3QiVoY/ACfN8x20AGY6AOTkq8UvFtqtJp+5xbnGrCxrYRC6AsF51Lx94/KAtC9fOJX59lBoU6GHEAnN3rITLZeQX8Aula6OMHKUQNg5SVqXWtepvfL8iEqwJvxkwgBtRFqN7dqulZpF/LwY23yJHg4YKeSL+1gFJHaJRcmFZoVTmyosWIWUOmaSRuT8/J3g==
X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:;
 IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE;
 SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(39860400002)(451199021)(40470700004)(46966006)(36840700001)(478600001)(1076003)(82310400005)(54906003)(2616005)(26005)(186003)(6666004)(426003)(336012)(356005)(81166007)(82740400003)(40460700003)(4326008)(47076005)(83380400001)(36756003)(110136005)(8676002)(316002)(30864003)(44832011)(2906002)(70586007)(70206006)(8936002)(5660300002)(41300700001)(36860700001)(40480700001)(86362001)(36900700001);
 DIR:OUT; SFP:1101; 
X-OriginatorOrg: amd.com
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 May 2023 10:09:00.8548 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: 4da0018c-3ee1-468a-cd20-08db5d080fd9
X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17];
 Helo=[SATLEXMB03.amd.com]
X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT084.eop-nam11.prod.protection.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6258
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org

MSI's are exposed to the devices using VFIO (vfio-cdx). This
patch uses the same to add support for MSI for the devices on
the cdx bus.

A couple of API's have been introduced in the EAL interrupt
framework:
- rte_intr_irq_count_set: This API is used to set the total
    interrupts on the interrupt handle. This would be provided
    by VFIO (irq.count) for VFIO enabled devices.
- rte_intr_irq_count_get: This API returns the total number
    interrupts which were set.

Signed-off-by: Nipun Gupta <nipun.gupta@amd.com>
Acked-by: Ferruh Yigit <ferruh.yigit@amd.com>
---
 drivers/bus/cdx/bus_cdx_driver.h |  25 +++++
 drivers/bus/cdx/cdx.c            |  11 ++
 drivers/bus/cdx/cdx_vfio.c       | 182 ++++++++++++++++++++++++++++++-
 drivers/bus/cdx/version.map      |   2 +
 4 files changed, 218 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/cdx/bus_cdx_driver.h b/drivers/bus/cdx/bus_cdx_driver.h
index f1dce06a16..a8c54d728e 100644
--- a/drivers/bus/cdx/bus_cdx_driver.h
+++ b/drivers/bus/cdx/bus_cdx_driver.h
@@ -67,6 +67,7 @@ struct rte_cdx_device {
 	struct rte_cdx_id id;			/**< CDX ID. */
 	struct rte_mem_resource mem_resource[CDX_MAX_RESOURCE];
 						/**< CDX Memory Resource */
+	struct rte_intr_handle *intr_handle;	/**< Interrupt handle */
 };
 
 /**
@@ -168,6 +169,30 @@ void rte_cdx_unmap_device(struct rte_cdx_device *dev);
 __rte_internal
 void rte_cdx_register(struct rte_cdx_driver *driver);
 
+/**
+ * Enables VFIO Interrupts for CDX bus devices.
+ *
+ * @param intr_handle
+ *   Pointer to the interrupt handle.
+ *
+ *  @return
+ *  0 on success, -1 on error.
+ */
+__rte_internal
+int rte_cdx_vfio_intr_enable(const struct rte_intr_handle *intr_handle);
+
+/**
+ * Disable VFIO Interrupts for CDX bus devices.
+ *
+ * @param intr_handle
+ *   Pointer to the interrupt handle.
+ *
+ *  @return
+ *  0 on success, -1 on error.
+ */
+__rte_internal
+int rte_cdx_vfio_intr_disable(const struct rte_intr_handle *intr_handle);
+
 /**
  * Helper for CDX device registration from driver (eth, crypto, raw) instance
  */
diff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c
index 64ea879f3b..c691c38e04 100644
--- a/drivers/bus/cdx/cdx.c
+++ b/drivers/bus/cdx/cdx.c
@@ -201,6 +201,15 @@ cdx_scan_one(const char *dirname, const char *dev_name)
 		goto err;
 	}
 
+	/* Allocate interrupt instance for cdx device */
+	dev->intr_handle =
+		rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
+	if (dev->intr_handle == NULL) {
+		CDX_BUS_ERR("Failed to create interrupt instance for %s\n",
+			dev->device.name);
+		return -ENOMEM;
+	}
+
 	/*
 	 * Check if device is bound to 'vfio-cdx' driver, so that user-space
 	 * can gracefully access the device.
@@ -391,6 +400,8 @@ cdx_probe_one_driver(struct rte_cdx_driver *dr,
 	return ret;
 
 error_probe:
+	rte_intr_instance_free(dev->intr_handle);
+	dev->intr_handle = NULL;
 	cdx_vfio_unmap_resource(dev);
 error_map_device:
 	return ret;
diff --git a/drivers/bus/cdx/cdx_vfio.c b/drivers/bus/cdx/cdx_vfio.c
index e54432de5b..ec6512e158 100644
--- a/drivers/bus/cdx/cdx_vfio.c
+++ b/drivers/bus/cdx/cdx_vfio.c
@@ -50,6 +50,10 @@ struct mapped_cdx_resource {
 /** mapped cdx device list */
 TAILQ_HEAD(mapped_cdx_res_list, mapped_cdx_resource);
 
+/* IRQ set buffer length for MSI interrupts */
+#define MSI_IRQ_SET_BUF_LEN (sizeof(struct vfio_irq_set) + \
+			      sizeof(int) * (RTE_MAX_RXTX_INTR_VEC_ID + 1))
+
 static struct rte_tailq_elem cdx_vfio_tailq = {
 	.name = "VFIO_CDX_RESOURCE_LIST",
 };
@@ -94,6 +98,27 @@ cdx_vfio_unmap_resource_primary(struct rte_cdx_device *dev)
 	char cdx_addr[PATH_MAX] = {0};
 	struct mapped_cdx_resource *vfio_res = NULL;
 	struct mapped_cdx_res_list *vfio_res_list;
+	int ret, vfio_dev_fd;
+
+	if (rte_intr_fd_get(dev->intr_handle) < 0)
+		return -1;
+
+	if (close(rte_intr_fd_get(dev->intr_handle)) < 0) {
+		CDX_BUS_ERR("Error when closing eventfd file descriptor for %s",
+			dev->device.name);
+		return -1;
+	}
+
+	vfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);
+	if (vfio_dev_fd < 0)
+		return -1;
+
+	ret = rte_vfio_release_device(rte_cdx_get_sysfs_path(), dev->device.name,
+				      vfio_dev_fd);
+	if (ret < 0) {
+		CDX_BUS_ERR("Cannot release VFIO device");
+		return ret;
+	}
 
 	vfio_res_list =
 		RTE_TAILQ_CAST(cdx_vfio_tailq.head, mapped_cdx_res_list);
@@ -116,6 +141,18 @@ cdx_vfio_unmap_resource_secondary(struct rte_cdx_device *dev)
 {
 	struct mapped_cdx_resource *vfio_res = NULL;
 	struct mapped_cdx_res_list *vfio_res_list;
+	int ret, vfio_dev_fd;
+
+	vfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);
+	if (vfio_dev_fd < 0)
+		return -1;
+
+	ret = rte_vfio_release_device(rte_cdx_get_sysfs_path(), dev->device.name,
+				      vfio_dev_fd);
+	if (ret < 0) {
+		CDX_BUS_ERR("Cannot release VFIO device");
+		return ret;
+	}
 
 	vfio_res_list =
 		RTE_TAILQ_CAST(cdx_vfio_tailq.head, mapped_cdx_res_list);
@@ -140,9 +177,80 @@ cdx_vfio_unmap_resource(struct rte_cdx_device *dev)
 		return cdx_vfio_unmap_resource_secondary(dev);
 }
 
+/* set up interrupt support (but not enable interrupts) */
 static int
-cdx_rte_vfio_setup_device(int vfio_dev_fd)
+cdx_vfio_setup_interrupts(struct rte_cdx_device *dev, int vfio_dev_fd,
+		int num_irqs)
 {
+	int i, ret;
+
+	if (num_irqs == 0)
+		return 0;
+
+	/* start from MSI interrupt type */
+	for (i = 0; i < num_irqs; i++) {
+		struct vfio_irq_info irq = { .argsz = sizeof(irq) };
+		int fd = -1;
+
+		irq.index = i;
+
+		ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
+		if (ret < 0) {
+			CDX_BUS_ERR("Cannot get VFIO IRQ info, error %i (%s)",
+				errno, strerror(errno));
+			return -1;
+		}
+
+		/* if this vector cannot be used with eventfd, fail if we explicitly
+		 * specified interrupt type, otherwise continue
+		 */
+		if ((irq.flags & VFIO_IRQ_INFO_EVENTFD) == 0)
+			continue;
+
+		if (rte_intr_irq_count_set(dev->intr_handle, irq.count))
+			return -1;
+
+		/* Reallocate the efds and elist fields of intr_handle based
+		 * on CDX device MSI size.
+		 */
+		if ((uint32_t)rte_intr_nb_intr_get(dev->intr_handle) < irq.count &&
+				rte_intr_event_list_update(dev->intr_handle, irq.count))
+			return -1;
+
+		/* set up an eventfd for interrupts */
+		fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
+		if (fd < 0) {
+			CDX_BUS_ERR("Cannot set up eventfd, error %i (%s)",
+				errno, strerror(errno));
+			return -1;
+		}
+
+		if (rte_intr_fd_set(dev->intr_handle, fd))
+			return -1;
+
+		/* DPDK CDX bus currently supports only MSI-X */
+		if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_VFIO_MSIX))
+			return -1;
+
+		if (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))
+			return -1;
+
+		return 0;
+	}
+
+	/* if we're here, we haven't found a suitable interrupt vector */
+	return -1;
+}
+
+static int
+cdx_vfio_setup_device(struct rte_cdx_device *dev, int vfio_dev_fd,
+		int num_irqs)
+{
+	if (cdx_vfio_setup_interrupts(dev, vfio_dev_fd, num_irqs) != 0) {
+		CDX_BUS_ERR("Error setting up interrupts!");
+		return -1;
+	}
+
 	/*
 	 * Reset the device. If the device is not capable of resetting,
 	 * then it updates errno as EINVAL.
@@ -278,6 +386,9 @@ cdx_vfio_map_resource_primary(struct rte_cdx_device *dev)
 	struct cdx_map *maps;
 	int vfio_dev_fd, i, ret;
 
+	if (rte_intr_fd_set(dev->intr_handle, -1))
+		return -1;
+
 	ret = rte_vfio_setup_device(rte_cdx_get_sysfs_path(), dev_name,
 				    &vfio_dev_fd, &device_info);
 	if (ret)
@@ -343,7 +454,7 @@ cdx_vfio_map_resource_primary(struct rte_cdx_device *dev)
 		free(reg);
 	}
 
-	if (cdx_rte_vfio_setup_device(vfio_dev_fd) < 0) {
+	if (cdx_vfio_setup_device(dev, vfio_dev_fd, device_info.num_irqs) < 0) {
 		CDX_BUS_ERR("%s setup device failed", dev_name);
 		goto err_vfio_res;
 	}
@@ -373,6 +484,9 @@ cdx_vfio_map_resource_secondary(struct rte_cdx_device *dev)
 	const char *dev_name = dev->device.name;
 	struct cdx_map *maps;
 
+	if (rte_intr_fd_set(dev->intr_handle, -1))
+		return -1;
+
 	/* if we're in a secondary process, just find our tailq entry */
 	TAILQ_FOREACH(vfio_res, vfio_res_list, next) {
 		if (strcmp(vfio_res->name, dev_name))
@@ -406,6 +520,10 @@ cdx_vfio_map_resource_secondary(struct rte_cdx_device *dev)
 		dev->mem_resource[i].len = maps[i].size;
 	}
 
+	/* we need save vfio_dev_fd, so it can be used during release */
+	if (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))
+		goto err_vfio_dev_fd;
+
 	return 0;
 err_vfio_dev_fd:
 	rte_vfio_release_device(rte_cdx_get_sysfs_path(),
@@ -425,3 +543,63 @@ cdx_vfio_map_resource(struct rte_cdx_device *dev)
 	else
 		return cdx_vfio_map_resource_secondary(dev);
 }
+
+int
+rte_cdx_vfio_intr_enable(const struct rte_intr_handle *intr_handle)
+{
+	char irq_set_buf[MSI_IRQ_SET_BUF_LEN];
+	struct vfio_irq_set *irq_set;
+	int *fd_ptr, vfio_dev_fd, i;
+	int ret;
+
+	irq_set = (struct vfio_irq_set *) irq_set_buf;
+	irq_set->count = rte_intr_irq_count_get(intr_handle);
+	irq_set->argsz = sizeof(struct vfio_irq_set) +
+			 (sizeof(int) * irq_set->count);
+
+	irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
+	irq_set->index = 0;
+	irq_set->start = 0;
+	fd_ptr = (int *) &irq_set->data;
+
+	for (i = 0; i < rte_intr_nb_efd_get(intr_handle); i++)
+		fd_ptr[i] = rte_intr_efds_index_get(intr_handle, i);
+
+	vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
+	ret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
+
+	if (ret) {
+		CDX_BUS_ERR("Error enabling MSI interrupts for fd %d",
+			rte_intr_fd_get(intr_handle));
+		return -1;
+	}
+
+	return 0;
+}
+
+/* disable MSI interrupts */
+int
+rte_cdx_vfio_intr_disable(const struct rte_intr_handle *intr_handle)
+{
+	struct vfio_irq_set *irq_set;
+	char irq_set_buf[MSI_IRQ_SET_BUF_LEN];
+	int len, ret, vfio_dev_fd;
+
+	len = sizeof(struct vfio_irq_set);
+
+	irq_set = (struct vfio_irq_set *) irq_set_buf;
+	irq_set->argsz = len;
+	irq_set->count = 0;
+	irq_set->flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER;
+	irq_set->index = 0;
+	irq_set->start = 0;
+
+	vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);
+	ret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
+
+	if (ret)
+		CDX_BUS_ERR("Error disabling MSI interrupts for fd %d",
+			rte_intr_fd_get(intr_handle));
+
+	return ret;
+}
diff --git a/drivers/bus/cdx/version.map b/drivers/bus/cdx/version.map
index 957fcab978..2f3d484ebd 100644
--- a/drivers/bus/cdx/version.map
+++ b/drivers/bus/cdx/version.map
@@ -6,6 +6,8 @@ INTERNAL {
 	rte_cdx_register;
 	rte_cdx_unmap_device;
 	rte_cdx_unregister;
+	rte_cdx_vfio_intr_disable;
+	rte_cdx_vfio_intr_enable;
 
 	local: *;
 };
-- 
2.17.1