From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9160C42CAC; Wed, 14 Jun 2023 04:37:21 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D354442D20; Wed, 14 Jun 2023 04:37:10 +0200 (CEST) Received: from smtpbg153.qq.com (smtpbg153.qq.com [13.245.218.24]) by mails.dpdk.org (Postfix) with ESMTP id 9A45B4161A; Wed, 14 Jun 2023 04:37:07 +0200 (CEST) X-QQ-mid: bizesmtp73t1686710223tro4wvuz Received: from wxdbg.localdomain.com ( [183.159.171.58]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 14 Jun 2023 10:37:02 +0800 (CST) X-QQ-SSF: 01400000000000J0Z000000A0000000 X-QQ-FEAT: DBLGDch1WOT4u7Mp9s8Vhmfj5NrzMSbujd9BNUGbRBvT/1JKPYqahnxlNvuWw SjNpJajmBjL/4gqrbRKDkAHAQuLJgL1q5Ybt7AW04ERWaQB4/UPaP1pnVNPpBO2TjMiPxTp 3cI6AARFhR5wF/FD8y62+YwY4mk8bWmwkfj/ncHex4s0AFdQS7mpeVWchVRD8GsNRH5uw1B 62A6PpnZsUpe3OlpBJ0vxIVGGSNiLsJFlvvK2vqC+TC/Q41RRksDDTmdotmyrV5nYre603i FucDMtqzgF9lYXrQQ0WFXpxatl001UAxOG0QoJvBjZNVv7/mFeX8hjRP8Hpww2vPxjmx4Ig m6lp3qxR4fDyqfFPYYuc2a9SwWneFdBY3ZX1lDOlYbBM6Mohte9afI3pHlV1w== X-QQ-GoodBg: 2 X-BIZMAIL-ID: 5876781075020766163 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 3/9] net/txgbe: fix issues caused by MNG veto bit setting Date: Wed, 14 Jun 2023 10:34:23 +0800 Message-Id: <20230614023429.1002071-4-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20230614023429.1002071-1-jiawenwu@trustnetic.com> References: <20230614023429.1002071-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz5a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In the new firmware, MNG veto bit is set by default for new features. It leads to several issues, so driver makes the following changes: 1. Change the way by sending reset command to firmware to LAN reset. So that MNG domain will not be reset. 2. Change the hardware flush register since the original register cannot be read temporarily after LAN reset. 3. Remove checking of MNG veto bit when handling Tx laser. 4. Workaround for GPIO interrupt lost. Fixes: f58ae2fcfea6 ("net/txgbe: add HW init and reset operation") Fixes: e4c515a7bc7e ("net/txgbe: add multi-speed link setup") Fixes: d3bb4a04eac1 ("net/txgbe: add SFP hotplug identification") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_hw.c | 23 +++-------------------- drivers/net/txgbe/base/txgbe_regs.h | 14 +++++++++++++- drivers/net/txgbe/txgbe_ethdev.c | 27 +++++++++++++++++++++++++++ 3 files changed, 43 insertions(+), 21 deletions(-) diff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c index e7c9754d26..2952c408fd 100644 --- a/drivers/net/txgbe/base/txgbe_hw.c +++ b/drivers/net/txgbe/base/txgbe_hw.c @@ -2988,10 +2988,6 @@ void txgbe_disable_tx_laser_multispeed_fiber(struct txgbe_hw *hw) { u32 esdp_reg = rd32(hw, TXGBE_GPIODATA); - /* Blocked by MNG FW so bail */ - if (txgbe_check_reset_blocked(hw)) - return; - if (txgbe_close_notify(hw)) txgbe_led_off(hw, TXGBE_LEDCTL_UP | TXGBE_LEDCTL_10G | TXGBE_LEDCTL_1G | TXGBE_LEDCTL_ACTIVE); @@ -3039,10 +3035,6 @@ void txgbe_enable_tx_laser_multispeed_fiber(struct txgbe_hw *hw) **/ void txgbe_flap_tx_laser_multispeed_fiber(struct txgbe_hw *hw) { - /* Blocked by MNG FW so bail */ - if (txgbe_check_reset_blocked(hw)) - return; - if (hw->mac.autotry_restart) { txgbe_disable_tx_laser_multispeed_fiber(hw); txgbe_enable_tx_laser_multispeed_fiber(hw); @@ -3433,18 +3425,9 @@ s32 txgbe_reset_hw(struct txgbe_hw *hw) autoc = hw->mac.autoc_read(hw); mac_reset_top: - /* - * Issue global reset to the MAC. Needs to be SW reset if link is up. - * If link reset is used when link is up, it might reset the PHY when - * mng is using it. If link is down or the flag to force full link - * reset is set, then perform link reset. - */ - if (txgbe_mng_present(hw)) { - txgbe_hic_reset(hw); - } else { - wr32(hw, TXGBE_RST, TXGBE_RST_LAN(hw->bus.lan_id)); - txgbe_flush(hw); - } + /* Do LAN reset, the MNG domain will not be reset. */ + wr32(hw, TXGBE_RST, TXGBE_RST_LAN(hw->bus.lan_id)); + txgbe_flush(hw); usec_delay(10); txgbe_reset_misc(hw); diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h index bc2854b01a..79290a7afe 100644 --- a/drivers/net/txgbe/base/txgbe_regs.h +++ b/drivers/net/txgbe/base/txgbe_regs.h @@ -1885,7 +1885,19 @@ po32m(struct txgbe_hw *hw, u32 reg, u32 mask, u32 expect, u32 *actual, } /* flush all write operations */ -#define txgbe_flush(hw) rd32(hw, 0x00100C) +static inline void txgbe_flush(struct txgbe_hw *hw) +{ + switch (hw->mac.type) { + case txgbe_mac_raptor: + rd32(hw, TXGBE_PWR); + break; + case txgbe_mac_raptor_vf: + rd32(hw, TXGBE_VFSTATUS); + break; + default: + break; + } +} #define rd32a(hw, reg, idx) ( \ rd32((hw), (reg) + ((idx) << 2))) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 5eff1a766e..36c74d353d 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -1531,6 +1531,25 @@ txgbe_dev_configure(struct rte_eth_dev *dev) return 0; } +static void txgbe_reinit_gpio_intr(struct txgbe_hw *hw) +{ + u32 reg; + + wr32(hw, TXGBE_GPIOINTMASK, 0xFF); + reg = rd32(hw, TXGBE_GPIORAWINTSTAT); + + if (reg & TXGBE_GPIOBIT_2) + wr32(hw, TXGBE_GPIOEOI, TXGBE_GPIOBIT_2); + + if (reg & TXGBE_GPIOBIT_3) + wr32(hw, TXGBE_GPIOEOI, TXGBE_GPIOBIT_3); + + if (reg & TXGBE_GPIOBIT_6) + wr32(hw, TXGBE_GPIOEOI, TXGBE_GPIOBIT_6); + + wr32(hw, TXGBE_GPIOINTMASK, 0); +} + static void txgbe_dev_phy_intr_setup(struct rte_eth_dev *dev) { @@ -1680,6 +1699,10 @@ txgbe_dev_start(struct rte_eth_dev *dev) hw->mac.get_link_status = true; hw->dev_start = true; + /* workaround for GPIO intr lost when mng_veto bit is set */ + if (txgbe_check_reset_blocked(hw)) + txgbe_reinit_gpio_intr(hw); + /* configure PF module if SRIOV enabled */ txgbe_pf_host_configure(dev); @@ -1897,6 +1920,10 @@ txgbe_dev_stop(struct rte_eth_dev *dev) /* disable interrupts */ txgbe_disable_intr(hw); + /* workaround for GPIO intr lost when mng_veto bit is set */ + if (txgbe_check_reset_blocked(hw)) + txgbe_reinit_gpio_intr(hw); + /* reset the NIC */ txgbe_pf_reset_hw(hw); hw->adapter_stopped = 0; -- 2.27.0