From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5223A42CC7; Thu, 15 Jun 2023 17:29:01 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F3A7640EE3; Thu, 15 Jun 2023 17:29:00 +0200 (CEST) Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) by mails.dpdk.org (Postfix) with ESMTP id C690140E0F for ; Thu, 15 Jun 2023 17:28:59 +0200 (CEST) Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-1b517ee9157so5644305ad.3 for ; Thu, 15 Jun 2023 08:28:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20221208.gappssmtp.com; s=20221208; t=1686842939; x=1689434939; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:from:to:cc:subject:date :message-id:reply-to; bh=QHZLqlL32PM/4H8kQ2AKqW54plcrxe3Q51nurGQsjF8=; b=Mo36Y8y83N0y/BiaEQ2EG0vOOj6joov33PP+FDWHrYnoVNM7BWfK2JP1dSKzmda1Cg utLmLWp2rPRlBiSiGS6Wg/E0bIQxNr0bbpDK9ngLzcx8Um2yCF2++hazudFkbURvdErw CXH4KzboscgfXyzaCXDmn5DkqpKJuGcMgPr/RVOWfCQD8OI/ctkx2anyVnmvgxQKX6LY a3nx6FiWyp0G81JpsB92b4g9WZZYtwknGk0N/Zip+IHpbKYotr8Iu2fOKCWONDPsapNj FGtVJRjFdxKXsZufwHtsusWzVNLPItaAvCHPG/5MhNYfsLQF767kFFyEnUIkNQ1jyqX5 8gdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686842939; x=1689434939; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QHZLqlL32PM/4H8kQ2AKqW54plcrxe3Q51nurGQsjF8=; b=GdsVtpz5luKbHs6yERQQUeX9/jDZ7N+y2YNjq0NcmunY2A19VepyynEcO0375SNl1j 8bAYYLp5y/LrmehQIT+hKxgA6S2fBumIPXxaXkdBO4JyBB7IcJsjhMVbxTvHNfKCndmA on4hNizGtMx2iogt/ZPdKyiqIBAJi+2jbvXl9kKWJ3bObtvKt0ZpayxV6mGIgxqzjvdI LxuVgvINzkmMK1o08AHzW+LbUxTUTVjg3ssmwi/JSkk51SF0ovZXNfkmHarzEd4o/F2z WW2VWMckQ85FmYT2HkmmAlBA3EnmEkEOXSA3TEiZLsT653t8TpjsbTX4uRWevoDE2ysu ZC2g== X-Gm-Message-State: AC+VfDzFfFR6amyGq2vZXAvw3gbsaAGNS2BZ4FoPLsUXmSEuF7EkJ3BY KiEyMx782+25JK908QLhUTm6UA== X-Google-Smtp-Source: ACHHUZ7B8zVv2CIEH96aA8iy8fQLEt8nqmjxPSE3aVANSXpqrQ5VUa/UTeSl3JD7kbmpON7HVwjOBw== X-Received: by 2002:a17:902:6b04:b0:1b3:fb75:dd24 with SMTP id o4-20020a1709026b0400b001b3fb75dd24mr5547853plk.48.1686842938908; Thu, 15 Jun 2023 08:28:58 -0700 (PDT) Received: from hermes.local (204-195-120-218.wavecable.com. [204.195.120.218]) by smtp.gmail.com with ESMTPSA id q6-20020a170902dac600b001b3c66f806bsm497269plx.217.2023.06.15.08.28.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jun 2023 08:28:58 -0700 (PDT) Date: Thu, 15 Jun 2023 08:28:57 -0700 From: Stephen Hemminger To: Cc: , "Shijith Thotton" , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Subject: Re: [PATCH v2 3/3] event/cnxk: use WFE in Tx fc wait Message-ID: <20230615082857.6c76120d@hermes.local> In-Reply-To: <20230613092548.1315-3-pbhagavatula@marvell.com> References: <20230516143752.4941-1-pbhagavatula@marvell.com> <20230613092548.1315-1-pbhagavatula@marvell.com> <20230613092548.1315-3-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Tue, 13 Jun 2023 14:55:48 +0530 wrote: > static __rte_always_inline void > cn10k_sso_txq_fc_wait(const struct cn10k_eth_txq *txq) > { > +#ifdef RTE_ARCH_ARM64 > + uint64_t space; > + > + asm volatile(PLT_CPU_FEATURE_PREAMBLE > + " ldxr %[space], [%[addr]] \n" > + " cmp %[adj], %[space] \n" > + " b.hi .Ldne%= \n" > + " sevl \n" > + ".Lrty%=: wfe \n" > + " ldxr %[space], [%[addr]] \n" > + " cmp %[adj], %[space] \n" > + " b.ls .Lrty%= \n" > + ".Ldne%=: \n" > + : [space] "=&r"(space) > + : [adj] "r"(txq->nb_sqb_bufs_adj), [addr] "r"(txq->fc_mem) > + : "memory"); > +#else > while ((uint64_t)txq->nb_sqb_bufs_adj <= > __atomic_load_n(txq->fc_mem, __ATOMIC_RELAXED)) > ; > +#endif > } Rather than introduce assembly here, please extend existing rte_pause functions and then other drivers could benefit and it would fit existing WFE usage. Something like: static __rte_always_inline void rte_wait_until_le_32(volatile uint32_t *addr, uint32_t expected, int memorder); Direct assembly in drivers is hard to maintain and should be forbidden.