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From: Chaoyong He <chaoyong.he@corigine.com>
To: dev@dpdk.org
Cc: oss-drivers@corigine.com, niklas.soderlund@corigine.com,
	Peng Zhang <peng.zhang@corigine.com>,
	stable@dpdk.org, Chaoyong He <chaoyong.he@corigine.com>,
	Long Wu <long.wu@corigine.com>
Subject: [PATCH] net/nfp: fix the address always related with PF ID 0
Date: Fri, 16 Jun 2023 16:57:23 +0800	[thread overview]
Message-ID: <20230616085723.1308924-1-chaoyong.he@corigine.com> (raw)

From: Peng Zhang <peng.zhang@corigine.com>

Now the PCIE configure bar address is always related with PF ID 0.
For the NIC with multiple PCI device, this will lead the host crash.
Fix this problem by make the PCIE configure bar address related with
the PF ID.

Fixes: c7e9729da6b5 ("net/nfp: support CPP")
Cc: stable@dpdk.org

Signed-off-by: Peng Zhang <peng.zhang@corigine.com>
Reviewed-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Long Wu <long.wu@corigine.com>
---
 drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c
index 9d63e0ee73..d1c6f823b6 100644
--- a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c
+++ b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c
@@ -66,8 +66,8 @@
 #define NFP_PCIE_P2C_GENERAL_TOKEN_OFFSET(bar, x) ((x) << ((bar)->bitsize - 4))
 #define NFP_PCIE_P2C_GENERAL_SIZE(bar)             (1 << ((bar)->bitsize - 4))
 
-#define NFP_PCIE_CFG_BAR_PCIETOCPPEXPBAR(bar, slot) \
-	(NFP_PCIE_BAR(0) + ((bar) * 8 + (slot)) * 4)
+#define NFP_PCIE_CFG_BAR_PCIETOCPPEXPBAR(id, bar, slot) \
+	(NFP_PCIE_BAR(id) + ((bar) * 8 + (slot)) * 4)
 
 #define NFP_PCIE_CPP_BAR_PCIETOCPPEXPBAR(bar, slot) \
 	(((bar) * 8 + (slot)) * 4)
@@ -117,6 +117,7 @@ struct nfp_pcie_user {
 	int secondary_lock;
 	char busdev[BUSDEV_SZ];
 	int barsz;
+	int dev_id;
 	char *cfg;
 };
 
@@ -246,7 +247,7 @@ nfp_bar_write(struct nfp_pcie_user *nfp, struct nfp_bar *bar,
 		return (-ENOMEM);
 
 	bar->csr = nfp->cfg +
-		   NFP_PCIE_CFG_BAR_PCIETOCPPEXPBAR(base, slot);
+		   NFP_PCIE_CFG_BAR_PCIETOCPPEXPBAR(nfp->dev_id, base, slot);
 
 	*(uint32_t *)(bar->csr) = newcfg;
 
@@ -318,10 +319,8 @@ nfp_enable_bars(struct nfp_pcie_user *nfp)
 		bar->base = 0;
 		bar->iomem = NULL;
 		bar->lock = 0;
-		bar->csr = nfp->cfg +
-			   NFP_PCIE_CFG_BAR_PCIETOCPPEXPBAR(bar->index >> 3,
-							   bar->index & 7);
-
+		bar->csr = nfp->cfg + NFP_PCIE_CFG_BAR_PCIETOCPPEXPBAR(nfp->dev_id,
+				bar->index >> 3, bar->index & 7);
 		bar->iomem = nfp->cfg + (bar->index << bar->bitsize);
 	}
 	return 0;
@@ -836,6 +835,7 @@ nfp6000_init(struct nfp_cpp *cpp, struct rte_pci_device *dev)
 		goto error;
 
 	desc->cfg = dev->mem_resource[0].addr;
+	desc->dev_id = dev->addr.function & 0x7;
 
 	nfp_enable_bars(desc);
 
-- 
2.39.1


             reply	other threads:[~2023-06-16  8:57 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-16  8:57 Chaoyong He [this message]
2023-06-21 18:28 ` Ferruh Yigit

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