From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C1D8642D82; Wed, 28 Jun 2023 19:18:51 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4D590406B3; Wed, 28 Jun 2023 19:18:51 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 4D45E40151 for ; Wed, 28 Jun 2023 19:18:49 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35SGWS02003203 for ; Wed, 28 Jun 2023 10:18:48 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=GclDkmQaoupRyjGE42U65YbgOwwOgdVjd+DbHvtyavY=; b=RHL5eHMvY/XFToj3ke8OwbiPj5GnmIfpDoc15/a2mSdjJjCnPELl0XML5T7+wLqJHgF4 HlJHI8/K0XoUwawd011ZycRvs8ZqyQcQHca+jWoS8s4SCbNqnUfJ8NihJlVXgXrS+A6I pOPvWGXNAac+XNCni+DETMxtEZLWctAHY6zq4829W+ish+TL/Uxd6kuBTJ/KymiDp1Se adJEPZXiZR1S5ozEGI40Ohr60K0ILxibxavfa/xv75HkEiuiRtRSOmMdYFk/UGsuGb91 mBuuHIHjX34F4qu2/yYR1P+Y0RjLHg2eaAjCNq9rJZkC/aVeybpGlnYzymILdmpbT5Mm eQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3re00k5hs6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 28 Jun 2023 10:18:48 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 28 Jun 2023 10:18:45 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 28 Jun 2023 10:18:45 -0700 Received: from localhost.localdomain (unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 959903F7085; Wed, 28 Jun 2023 10:18:44 -0700 (PDT) From: Amit Prakash Shukla To: Vamsi Attunuru CC: , , Amit Prakash Shukla Subject: [PATCH 1/7] dma/cnxk: changes for dmadev autotest Date: Wed, 28 Jun 2023 22:48:28 +0530 Message-ID: <20230628171834.771431-1-amitprakashs@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: kICeYr_GoxEj1_r4yuwgOh9cs_NAIsM9 X-Proofpoint-ORIG-GUID: kICeYr_GoxEj1_r4yuwgOh9cs_NAIsM9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_12,2023-06-27_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Code changes to fix issues observed during dmadev_autotest. Signed-off-by: Amit Prakash Shukla --- drivers/dma/cnxk/cnxk_dmadev.c | 120 +++++++++++++++++++++++++-------- drivers/dma/cnxk/cnxk_dmadev.h | 12 ++-- 2 files changed, 99 insertions(+), 33 deletions(-) diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c index a6f4a31e0e..77daa64b32 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.c +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -45,8 +45,6 @@ cnxk_dmadev_configure(struct rte_dma_dev *dev, int rc = 0; RTE_SET_USED(conf); - RTE_SET_USED(conf); - RTE_SET_USED(conf_sz); RTE_SET_USED(conf_sz); dpivf = dev->fp_obj->dev_private; rc = roc_dpi_configure(&dpivf->rdpi); @@ -105,9 +103,11 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, comp_data->cdata = DPI_REQ_CDATA; dpivf->conf.c_desc.compl_ptr[i] = comp_data; }; - dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC; + dpivf->conf.c_desc.max_cnt = conf->nb_desc; dpivf->conf.c_desc.head = 0; dpivf->conf.c_desc.tail = 0; + dpivf->pending_num_words = 0; + dpivf->pending = 0; return 0; } @@ -161,9 +161,11 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, comp_data->cdata = DPI_REQ_CDATA; dpivf->conf.c_desc.compl_ptr[i] = comp_data; }; - dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC; + dpivf->conf.c_desc.max_cnt = conf->nb_desc; dpivf->conf.c_desc.head = 0; dpivf->conf.c_desc.tail = 0; + dpivf->pending_num_words = 0; + dpivf->pending = 0; return 0; } @@ -175,6 +177,8 @@ cnxk_dmadev_start(struct rte_dma_dev *dev) dpivf->desc_idx = 0; dpivf->num_words = 0; + dpivf->pending = 0; + dpivf->pending_num_words = 0; roc_dpi_enable(&dpivf->rdpi); return 0; @@ -294,7 +298,7 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; comp_ptr->cdata = DPI_REQ_CDATA; header->cn9k.ptr = (uint64_t)comp_ptr; - STRM_INC(dpivf->conf.c_desc); + STRM_INC(dpivf->conf.c_desc, tail); header->cn9k.nfst = 1; header->cn9k.nlst = 1; @@ -325,10 +329,13 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, if (!rc) { if (flags & RTE_DMA_OP_FLAG_SUBMIT) { rte_wmb(); - plt_write64(num_words, - dpivf->rdpi.rbase + DPI_VDMA_DBELL); + plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); dpivf->stats.submitted++; + } else { + dpivf->pending_num_words += num_words; + dpivf->pending++; } + dpivf->num_words += num_words; } @@ -353,7 +360,7 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; comp_ptr->cdata = DPI_REQ_CDATA; header->cn9k.ptr = (uint64_t)comp_ptr; - STRM_INC(dpivf->conf.c_desc); + STRM_INC(dpivf->conf.c_desc, tail); /* * For inbound case, src pointers are last pointers. @@ -391,10 +398,13 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, if (!rc) { if (flags & RTE_DMA_OP_FLAG_SUBMIT) { rte_wmb(); - plt_write64(num_words, - dpivf->rdpi.rbase + DPI_VDMA_DBELL); + plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); dpivf->stats.submitted += nb_src; + } else { + dpivf->pending_num_words += num_words; + dpivf->pending++; } + dpivf->num_words += num_words; } @@ -417,7 +427,7 @@ cn10k_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; comp_ptr->cdata = DPI_REQ_CDATA; header->cn10k.ptr = (uint64_t)comp_ptr; - STRM_INC(dpivf->conf.c_desc); + STRM_INC(dpivf->conf.c_desc, tail); header->cn10k.nfst = 1; header->cn10k.nlst = 1; @@ -439,10 +449,13 @@ cn10k_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, if (!rc) { if (flags & RTE_DMA_OP_FLAG_SUBMIT) { rte_wmb(); - plt_write64(num_words, - dpivf->rdpi.rbase + DPI_VDMA_DBELL); + plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); dpivf->stats.submitted++; + } else { + dpivf->pending_num_words += num_words; + dpivf->pending++; } + dpivf->num_words += num_words; } @@ -467,7 +480,7 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; comp_ptr->cdata = DPI_REQ_CDATA; header->cn10k.ptr = (uint64_t)comp_ptr; - STRM_INC(dpivf->conf.c_desc); + STRM_INC(dpivf->conf.c_desc, tail); header->cn10k.nfst = nb_src & 0xf; header->cn10k.nlst = nb_dst & 0xf; @@ -495,10 +508,13 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, if (!rc) { if (flags & RTE_DMA_OP_FLAG_SUBMIT) { rte_wmb(); - plt_write64(num_words, - dpivf->rdpi.rbase + DPI_VDMA_DBELL); + plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); dpivf->stats.submitted += nb_src; + } else { + dpivf->pending_num_words += num_words; + dpivf->pending++; } + dpivf->num_words += num_words; } @@ -506,33 +522,41 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, } static uint16_t -cnxk_dmadev_completed(void *dev_private, uint16_t vchan, const uint16_t nb_cpls, - uint16_t *last_idx, bool *has_error) +cnxk_dmadev_completed(void *dev_private, uint16_t vchan, const uint16_t nb_cpls, uint16_t *last_idx, + bool *has_error) { struct cnxk_dpi_vf_s *dpivf = dev_private; + struct cnxk_dpi_compl_s *comp_ptr; int cnt; RTE_SET_USED(vchan); - if (dpivf->stats.submitted == dpivf->stats.completed) + if (dpivf->stats.submitted == dpivf->stats.completed) { + *last_idx = dpivf->stats.completed - 1; return 0; + } for (cnt = 0; cnt < nb_cpls; cnt++) { - struct cnxk_dpi_compl_s *comp_ptr = - dpivf->conf.c_desc.compl_ptr[cnt]; + comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.head]; if (comp_ptr->cdata) { if (comp_ptr->cdata == DPI_REQ_CDATA) break; *has_error = 1; dpivf->stats.errors++; + STRM_INC(dpivf->conf.c_desc, head); break; } + + comp_ptr->cdata = DPI_REQ_CDATA; + STRM_INC(dpivf->conf.c_desc, head); } - *last_idx = cnt - 1; - dpivf->conf.c_desc.tail = cnt; + if (*has_error) + cnt = cnt - 1; + dpivf->stats.completed += cnt; + *last_idx = dpivf->stats.completed - 1; return cnt; } @@ -547,9 +571,15 @@ cnxk_dmadev_completed_status(void *dev_private, uint16_t vchan, RTE_SET_USED(vchan); RTE_SET_USED(last_idx); + + if (dpivf->stats.submitted == dpivf->stats.completed) { + *last_idx = dpivf->stats.completed - 1; + return 0; + } + for (cnt = 0; cnt < nb_cpls; cnt++) { struct cnxk_dpi_compl_s *comp_ptr = - dpivf->conf.c_desc.compl_ptr[cnt]; + dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.head]; status[cnt] = comp_ptr->cdata; if (status[cnt]) { if (status[cnt] == DPI_REQ_CDATA) @@ -557,23 +587,54 @@ cnxk_dmadev_completed_status(void *dev_private, uint16_t vchan, dpivf->stats.errors++; } + comp_ptr->cdata = DPI_REQ_CDATA; + STRM_INC(dpivf->conf.c_desc, head); } - *last_idx = cnt - 1; - dpivf->conf.c_desc.tail = 0; dpivf->stats.completed += cnt; + *last_idx = dpivf->stats.completed - 1; return cnt; } +static uint16_t +cnxk_damdev_burst_capacity(const void *dev_private, uint16_t vchan) +{ + const struct cnxk_dpi_vf_s *dpivf = (const struct cnxk_dpi_vf_s *)dev_private; + + RTE_SET_USED(vchan); + + if (dpivf->conf.c_desc.head == dpivf->conf.c_desc.tail) + return dpivf->conf.c_desc.max_cnt; + + if ((dpivf->conf.c_desc.head == (dpivf->conf.c_desc.tail + 1)) || + (dpivf->conf.c_desc.tail == 0 && dpivf->conf.c_desc.head == dpivf->conf.c_desc.max_cnt)) + return 0; + + if (dpivf->conf.c_desc.head < dpivf->conf.c_desc.tail) + return (dpivf->conf.c_desc.max_cnt - + (dpivf->conf.c_desc.tail - dpivf->conf.c_desc.head)); + + if (dpivf->conf.c_desc.head > dpivf->conf.c_desc.tail) + return (((dpivf->conf.c_desc.max_cnt + dpivf->conf.c_desc.head) % + dpivf->conf.c_desc.max_cnt) - + dpivf->conf.c_desc.tail); + + return 0; +} + static int cnxk_dmadev_submit(void *dev_private, uint16_t vchan __rte_unused) { struct cnxk_dpi_vf_s *dpivf = dev_private; + uint32_t num_words = dpivf->pending_num_words; rte_wmb(); - plt_write64(dpivf->num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); - dpivf->stats.submitted++; + plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); + + dpivf->stats.submitted += dpivf->pending; + dpivf->pending_num_words = 0; + dpivf->pending = 0; return 0; } @@ -666,6 +727,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, dmadev->fp_obj->submit = cnxk_dmadev_submit; dmadev->fp_obj->completed = cnxk_dmadev_completed; dmadev->fp_obj->completed_status = cnxk_dmadev_completed_status; + dmadev->fp_obj->burst_capacity = cnxk_damdev_burst_capacity; if (pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CN10KA || pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CNF10KA || @@ -682,6 +744,8 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, if (rc < 0) goto err_out_free; + dmadev->state = RTE_DMA_DEV_READY; + return 0; err_out_free: diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h index e1f5694f50..24ce94b9c1 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.h +++ b/drivers/dma/cnxk/cnxk_dmadev.h @@ -4,11 +4,11 @@ #ifndef CNXK_DMADEV_H #define CNXK_DMADEV_H -#define DPI_MAX_POINTER 15 -#define DPI_QUEUE_STOP 0x0 -#define DPI_QUEUE_START 0x1 -#define STRM_INC(s) ((s).tail = ((s).tail + 1) % (s).max_cnt) -#define DPI_MAX_DESC 1024 +#define DPI_MAX_POINTER 15 +#define DPI_QUEUE_STOP 0x0 +#define DPI_QUEUE_START 0x1 +#define STRM_INC(s, var) ((s).var = ((s).var + 1) % (s).max_cnt) +#define DPI_MAX_DESC 1024 /* Set Completion data to 0xFF when request submitted, * upon successful request completion engine reset to completion status @@ -38,6 +38,8 @@ struct cnxk_dpi_vf_s { struct rte_dma_stats stats; uint64_t cmd[DPI_MAX_CMD_SIZE]; uint32_t num_words; + uint16_t pending; + uint16_t pending_num_words; uint16_t desc_idx; }; -- 2.25.1