From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7759243026; Thu, 10 Aug 2023 14:37:03 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E2CDE43263; Thu, 10 Aug 2023 14:36:51 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 1930C4325D for ; Thu, 10 Aug 2023 14:36:51 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37A8XuHp020364; Thu, 10 Aug 2023 05:36:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=0Nj+NK4p40h5HFERkdEb5StCHlioJ6EGAVkkH2au3w0=; b=GDL1iyuHh1mat39zelLFk32NGD8o/JUnFOaAFJvJRUntN0Re9NGyont4ww7KIvf+IzNC PhGTTHHj34UhBPd5Wv+hor+JQhUcJ1zvahP6+UPcBTJksQYuIIPDzkZOBSmsNMMvYFU2 Bg9eemzarDBisHlLoN2x39v+UdlF2Z1xpYzf4jffxroYak1JKOcYCh8xsYdjidgxeIoT jW0LooE3tPvJy403Y0ICJeizF8FmcMKATJytcUJcEHQPA7/lI9eCUxhdPQEekGmzTp3n kgd/yDTcqixL7EVNycaDFk6U08w6Pskyjo6MNTJSbVKa7VcBZXRE7FC1zpTIYuFPMmXl tA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3scj5man4d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 10 Aug 2023 05:36:50 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Thu, 10 Aug 2023 05:36:48 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Thu, 10 Aug 2023 05:36:48 -0700 Received: from BG-LT91401.marvell.com (BG-LT91401.marvell.com [10.28.168.34]) by maili.marvell.com (Postfix) with ESMTP id E82DE3F70B1; Thu, 10 Aug 2023 05:36:45 -0700 (PDT) From: Gowrishankar Muthukrishnan To: CC: , Chengwen Feng , "Vamsi Attunuru" , Vidya Sagar Velumuri , Gowrishankar Muthukrishnan Subject: [PATCH v2 3/3] test/dma: add SG copy tests Date: Thu, 10 Aug 2023 18:06:33 +0530 Message-ID: <20230810123633.2455-4-gmuthukrishn@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20230810123633.2455-1-gmuthukrishn@marvell.com> References: <20230810115933.2164-1-gmuthukrishn@marvell.com> <20230810123633.2455-1-gmuthukrishn@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: jQj8vYIeLF5-Svav-pGCLxyxZ5vMUi3t X-Proofpoint-GUID: jQj8vYIeLF5-Svav-pGCLxyxZ5vMUi3t X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-10_10,2023-08-10_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add scatter-gather copy tests. Signed-off-by: Vidya Sagar Velumuri Signed-off-by: Gowrishankar Muthukrishnan --- app/test/test_dmadev.c | 124 +++++++++++++++++++++++++++- app/test/test_dmadev_api.c | 163 ++++++++++++++++++++++++++++++++++--- app/test/test_dmadev_api.h | 2 + 3 files changed, 274 insertions(+), 15 deletions(-) diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c index 0736ff2a18..abe970baaf 100644 --- a/app/test/test_dmadev.c +++ b/app/test/test_dmadev.c @@ -18,7 +18,7 @@ #define ERR_RETURN(...) do { print_err(__func__, __LINE__, __VA_ARGS__); return -1; } while (0) -#define COPY_LEN 1024 +#define COPY_LEN 1032 static struct rte_mempool *pool; static uint16_t id_count; @@ -346,6 +346,120 @@ test_stop_start(int16_t dev_id, uint16_t vchan) return 0; } +static int +test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan) +{ + unsigned int src_len, dst_len, n_sge, len, i, j, k; + char orig_src[COPY_LEN], orig_dst[COPY_LEN]; + struct rte_dma_info info = { 0 }; + enum rte_dma_status_code status; + uint16_t id, n_src, n_dst; + + if (rte_dma_info_get(dev_id, &info) < 0) + ERR_RETURN("Failed to get dev info"); + + n_sge = RTE_MIN(info.max_sges, TEST_SG_MAX); + len = COPY_LEN; + + for (n_src = 1; n_src <= n_sge; n_src++) { + src_len = len / n_src; + for (n_dst = 1; n_dst <= n_sge; n_dst++) { + dst_len = len / n_dst; + + struct rte_dma_sge sg_src[n_sge], sg_dst[n_sge]; + struct rte_mbuf *src[n_sge], *dst[n_sge]; + char *src_data[n_sge], *dst_data[n_sge]; + + for (i = 0 ; i < COPY_LEN; i++) + orig_src[i] = rte_rand() & 0xFF; + + memset(orig_dst, 0, COPY_LEN); + + for (i = 0; i < n_src; i++) { + src[i] = rte_pktmbuf_alloc(pool); + RTE_ASSERT(src[i] != NULL); + sg_src[i].addr = rte_pktmbuf_iova(src[i]); + sg_src[i].length = src_len; + src_data[i] = rte_pktmbuf_mtod(src[i], char *); + } + + for (k = 0; k < n_dst; k++) { + dst[k] = rte_pktmbuf_alloc(pool); + RTE_ASSERT(dst[k] != NULL); + sg_dst[k].addr = rte_pktmbuf_iova(dst[k]); + sg_dst[k].length = dst_len; + dst_data[k] = rte_pktmbuf_mtod(dst[k], char *); + } + + for (i = 0; i < n_src; i++) { + for (j = 0; j < src_len; j++) + src_data[i][j] = orig_src[i * src_len + j]; + } + + for (k = 0; k < n_dst; k++) + memset(dst_data[k], 0, dst_len); + + printf("\tsrc segs: %2d [seg len: %4d] - dst segs: %2d [seg len : %4d]\n", + n_src, src_len, n_dst, dst_len); + + id = rte_dma_copy_sg(dev_id, vchan, sg_src, sg_dst, n_src, n_dst, + RTE_DMA_OP_FLAG_SUBMIT); + + if (id != id_count) + ERR_RETURN("Error with rte_dma_copy_sg, got %u, expected %u\n", + id, id_count); + + /* Give time for copy to finish, then check it was done */ + await_hw(dev_id, vchan); + + for (k = 0; k < n_dst; k++) + memcpy((&orig_dst[0] + k * dst_len), dst_data[k], dst_len); + + if (memcmp(orig_src, orig_dst, COPY_LEN)) + ERR_RETURN("Data mismatch"); + + /* Verify completion */ + id = ~id; + if (rte_dma_completed(dev_id, vchan, 1, &id, NULL) != 1) + ERR_RETURN("Error with rte_dma_completed\n"); + + /* Verify expected index(id_count) */ + if (id != id_count) + ERR_RETURN("Error:incorrect job id received, %u [expected %u]\n", + id, id_count); + + /* Check for completed and id when no job done */ + id = ~id; + if (rte_dma_completed(dev_id, vchan, 1, &id, NULL) != 0) + ERR_RETURN("Error with rte_dma_completed when no job done\n"); + + if (id != id_count) + ERR_RETURN("Error:incorrect job id received when no job done, %u [expected %u]\n", + id, id_count); + + /* Check for completed_status and id when no job done */ + id = ~id; + if (rte_dma_completed_status(dev_id, vchan, 1, &id, &status) != 0) + ERR_RETURN("Error with rte_dma_completed_status when no job done\n"); + if (id != id_count) + ERR_RETURN("Error:incorrect job id received when no job done, %u [expected %u]\n", + id, 0); + + for (i = 0; i < n_src; i++) + rte_pktmbuf_free(src[i]); + for (i = 0; i < n_dst; i++) + rte_pktmbuf_free(dst[i]); + + /* Verify that completion returns nothing more */ + if (rte_dma_completed(dev_id, 0, 1, NULL, NULL) != 0) + ERR_RETURN("Error with rte_dma_completed in empty check\n"); + + id_count++; + } + } + return 0; +} + /* Failure handling test cases - global macros and variables for those tests*/ #define COMP_BURST_SZ 16 #define OPT_FENCE(idx) ((fence && idx == 8) ? RTE_DMA_OP_FLAG_FENCE : 0) @@ -852,7 +966,7 @@ test_dmadev_instance(int16_t dev_id) TEST_RINGSIZE * 2, /* n == num elements */ 32, /* cache size */ 0, /* priv size */ - 2048, /* data room size */ + COPY_LEN + RTE_PKTMBUF_HEADROOM, /* data room size */ info.numa_node); if (pool == NULL) ERR_RETURN("Error with mempool creation\n"); @@ -865,6 +979,12 @@ test_dmadev_instance(int16_t dev_id) if (runtest("stop-start", test_stop_start, 1, dev_id, vchan, CHECK_ERRS) < 0) goto err; + /* run SG test cases */ + if ((info.dev_capa & RTE_DMA_CAPA_OPS_COPY_SG) == 0) + printf("DMA Dev %u: No SG support, skipping SG copy tests\n", dev_id); + else if (runtest("sg_copy", test_enqueue_sg_copies, 1, dev_id, vchan, CHECK_ERRS) < 0) + goto err; + /* run some burst capacity tests */ if (rte_dma_burst_capacity(dev_id, vchan) < 64) printf("DMA Dev %u: insufficient burst capacity (64 required), skipping tests\n", diff --git a/app/test/test_dmadev_api.c b/app/test/test_dmadev_api.c index 5cdd87e162..0934cc81cc 100644 --- a/app/test/test_dmadev_api.c +++ b/app/test/test_dmadev_api.c @@ -10,8 +10,7 @@ #include #include "test.h" - -extern int test_dma_api(uint16_t dev_id); +#include "test_dmadev_api.h" #define DMA_TEST_API_RUN(test) \ testsuite_run_test(test, #test) @@ -24,6 +23,8 @@ static int16_t invalid_dev_id; static char *src; static char *dst; +static char *src_sg[TEST_SG_MAX]; +static char *dst_sg[TEST_SG_MAX]; static int total; static int passed; @@ -35,17 +36,27 @@ testsuite_setup(int16_t dev_id) { test_dev_id = dev_id; invalid_dev_id = -1; + int i, rc = 0; + + for (i = 0; i < TEST_SG_MAX; i++) { + src_sg[i] = rte_malloc("dmadev_test_src", TEST_MEMCPY_SIZE, 0); + if (src_sg[i] == NULL) { + rc = -ENOMEM; + goto exit; + } - src = rte_malloc("dmadev_test_src", TEST_MEMCPY_SIZE, 0); - if (src == NULL) - return -ENOMEM; - dst = rte_malloc("dmadev_test_dst", TEST_MEMCPY_SIZE, 0); - if (dst == NULL) { - rte_free(src); - src = NULL; - return -ENOMEM; + dst_sg[i] = rte_malloc("dmadev_test_dst", TEST_MEMCPY_SIZE, 0); + if (dst_sg[i] == NULL) { + rte_free(src_sg[i]); + src_sg[i] = NULL; + rc = -ENOMEM; + goto exit; + } } + src = src_sg[0]; + dst = dst_sg[0]; + total = 0; passed = 0; failed = 0; @@ -56,15 +67,29 @@ testsuite_setup(int16_t dev_id) */ rte_log_set_level_pattern("lib.dmadev", RTE_LOG_CRIT); - return 0; + return rc; +exit: + while (--i >= 0) { + rte_free(src_sg[i]); + rte_free(dst_sg[i]); + } + + return rc; } static void testsuite_teardown(void) { - rte_free(src); + int i; + + for (i = 0; i < TEST_SG_MAX; i++) { + rte_free(src_sg[i]); + src_sg[i] = NULL; + rte_free(dst_sg[i]); + dst_sg[i] = NULL; + } + src = NULL; - rte_free(dst); dst = NULL; /* Ensure the dmadev is stopped. */ rte_dma_stop(test_dev_id); @@ -484,6 +509,37 @@ verify_memory(void) return 0; } +static void +sg_memory_setup(int n) +{ + int i, j; + + for (i = 0; i < n; i++) { + for (j = 0; j < TEST_MEMCPY_SIZE; j++) + src_sg[i][j] = (char)j; + + memset(dst_sg[i], 0, TEST_MEMCPY_SIZE); + } +} + +static int +sg_memory_verify(int n) +{ + int i, j; + + for (i = 0; i < n; i++) { + for (j = 0; j < TEST_MEMCPY_SIZE; j++) { + if (src_sg[i][j] == dst_sg[i][j]) + continue; + + RTE_TEST_ASSERT_EQUAL(src_sg[i][j], dst_sg[i][j], "Failed to copy memory, %d %d", + src_sg[i][j], dst_sg[i][j]); + } + } + + return 0; +} + static int test_dma_completed(void) { @@ -598,6 +654,86 @@ test_dma_completed_status(void) return TEST_SUCCESS; } +static int +test_dma_sg(void) +{ + struct rte_dma_sge src_sge[TEST_SG_MAX], dst_sge[TEST_SG_MAX]; + struct rte_dma_info dev_info = { 0 }; + uint16_t last_idx = -1; + bool has_error = true; + int n_sge, i, ret; + uint16_t cpl_ret; + + ret = rte_dma_info_get(test_dev_id, &dev_info); + RTE_TEST_ASSERT_SUCCESS(ret, "Failed to obtain device info, %d", ret); + + if ((dev_info.dev_capa & RTE_DMA_CAPA_OPS_COPY_SG) == 0) + return TEST_SKIPPED; + + n_sge = RTE_MIN(dev_info.max_sges, TEST_SG_MAX); + + ret = setup_one_vchan(); + RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret); + + ret = rte_dma_start(test_dev_id); + RTE_TEST_ASSERT_SUCCESS(ret, "Failed to start, %d", ret); + + for (i = 0; i < n_sge; i++) { + src_sge[i].addr = rte_malloc_virt2iova(src_sg[i]); + src_sge[i].length = TEST_MEMCPY_SIZE; + dst_sge[i].addr = rte_malloc_virt2iova(dst_sg[i]); + dst_sge[i].length = TEST_MEMCPY_SIZE; + } + + sg_memory_setup(n_sge); + + /* Check enqueue without submit */ + ret = rte_dma_copy_sg(test_dev_id, 0, src_sge, dst_sge, n_sge, n_sge, 0); + RTE_TEST_ASSERT_EQUAL(ret, 0, "Failed to enqueue copy, %d", ret); + + rte_delay_us_sleep(TEST_WAIT_US_VAL); + + cpl_ret = rte_dma_completed(test_dev_id, 0, 1, &last_idx, &has_error); + RTE_TEST_ASSERT_EQUAL(cpl_ret, 0, "Failed to get completed"); + + /* Check DMA submit */ + ret = rte_dma_submit(test_dev_id, 0); + RTE_TEST_ASSERT_SUCCESS(ret, "Failed to submit, %d", ret); + + rte_delay_us_sleep(TEST_WAIT_US_VAL); + + cpl_ret = rte_dma_completed(test_dev_id, 0, 1, &last_idx, &has_error); + RTE_TEST_ASSERT_EQUAL(cpl_ret, 1, "Failed to get completed"); + RTE_TEST_ASSERT_EQUAL(last_idx, 0, "Last idx should be zero, %u", last_idx); + RTE_TEST_ASSERT_EQUAL(has_error, false, "Should have no error"); + + ret = sg_memory_verify(n_sge); + RTE_TEST_ASSERT_SUCCESS(ret, "Failed to verify memory"); + + sg_memory_setup(n_sge); + + /* Check for enqueue with submit */ + ret = rte_dma_copy_sg(test_dev_id, 0, src_sge, dst_sge, n_sge, n_sge, + RTE_DMA_OP_FLAG_SUBMIT); + RTE_TEST_ASSERT_EQUAL(ret, 1, "Failed to enqueue copy, %d", ret); + + rte_delay_us_sleep(TEST_WAIT_US_VAL); + + cpl_ret = rte_dma_completed(test_dev_id, 0, 1, &last_idx, &has_error); + RTE_TEST_ASSERT_EQUAL(cpl_ret, 1, "Failed to get completed"); + RTE_TEST_ASSERT_EQUAL(last_idx, 1, "Last idx should be 1, %u", last_idx); + RTE_TEST_ASSERT_EQUAL(has_error, false, "Should have no error"); + + ret = sg_memory_verify(n_sge); + RTE_TEST_ASSERT_SUCCESS(ret, "Failed to verify memory"); + + /* Stop dmadev to make sure dmadev to a known state */ + ret = rte_dma_stop(test_dev_id); + RTE_TEST_ASSERT_SUCCESS(ret, "Failed to stop, %d", ret); + + return TEST_SUCCESS; +} + int test_dma_api(uint16_t dev_id) { @@ -622,6 +758,7 @@ test_dma_api(uint16_t dev_id) DMA_TEST_API_RUN(test_dma_dump); DMA_TEST_API_RUN(test_dma_completed); DMA_TEST_API_RUN(test_dma_completed_status); + DMA_TEST_API_RUN(test_dma_sg); testsuite_teardown(); diff --git a/app/test/test_dmadev_api.h b/app/test/test_dmadev_api.h index 33fbc5bd41..10ab925f80 100644 --- a/app/test/test_dmadev_api.h +++ b/app/test/test_dmadev_api.h @@ -2,4 +2,6 @@ * Copyright(c) 2021 HiSilicon Limited */ +#define TEST_SG_MAX 4 + int test_dma_api(uint16_t dev_id); -- 2.25.1