From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6DC77430DF; Wed, 23 Aug 2023 13:16:01 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5E368411F3; Wed, 23 Aug 2023 13:16:01 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 46688410F1 for ; Wed, 23 Aug 2023 13:16:00 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37N7AM79013497 for ; Wed, 23 Aug 2023 04:15:59 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=QyHdgr4c37f/q+zRdx/Nam5tUqBwfyQ1RqE+2EVOihw=; b=P04zUzyipngY5WSCtUNotElGEbuSOwCce0d4Vf2yDfxBAL3drhwwEaOh8epM1nq3n0YS p/ttv7kkiLnPE86ySpVJFWtudLuLeHn57e4pou1O6sAdhtlt6prpc4iRW9PWqqx2bKas uCpvHLL7eH7OAErH95ZVNbU4Q6VREsd7oaNiqPw/2b/EECI80dk6SLCRy43elira4FL4 AaThmJz+0bH0+kPoMwlkYMiojF7O2QWnJ+4I4O77DVojp34JMuHDjrRMCyMG5GLQVh1N kN43ZfZGxRQ3eV/eun6Q8PQVho288BRDYpjD3Ua0MSNST3yZna+U0QYzF+PE6J/Y7qUK mQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3sn20ctmd2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 23 Aug 2023 04:15:59 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 23 Aug 2023 04:15:57 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 23 Aug 2023 04:15:57 -0700 Received: from localhost.localdomain (unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id B357C3F708A; Wed, 23 Aug 2023 04:15:55 -0700 (PDT) From: Amit Prakash Shukla To: Vamsi Attunuru CC: , , Amit Prakash Shukla Subject: [PATCH v5 02/12] dma/cnxk: support for burst capacity Date: Wed, 23 Aug 2023 16:45:15 +0530 Message-ID: <20230823111525.3975662-2-amitprakashs@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230823111525.3975662-1-amitprakashs@marvell.com> References: <20230821174942.3165191-1-amitprakashs@marvell.com> <20230823111525.3975662-1-amitprakashs@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: QjWgbGiMD7Pzy2kXelLYNHR6d9qAbSsG X-Proofpoint-ORIG-GUID: QjWgbGiMD7Pzy2kXelLYNHR6d9qAbSsG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-08-23_06,2023-08-22_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Adds support for the burst capacity. Call to the function return number of vacant space in descriptor ring for the current burst. Signed-off-by: Amit Prakash Shukla --- v2: - Fix for bugs observed in v1. - Squashed few commits. v3: - Resolved review suggestions. - Code improvement. v4: - Resolved checkpatch warnings. v5: - Updated commit message. - Split the commits. drivers/dma/cnxk/cnxk_dmadev.c | 125 ++++++++++++++++++++++----------- drivers/dma/cnxk/cnxk_dmadev.h | 6 +- 2 files changed, 87 insertions(+), 44 deletions(-) diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c index a6f4a31e0e..f06c979b9c 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.c +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -108,6 +108,7 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC; dpivf->conf.c_desc.head = 0; dpivf->conf.c_desc.tail = 0; + dpivf->pending = 0; return 0; } @@ -164,6 +165,7 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC; dpivf->conf.c_desc.head = 0; dpivf->conf.c_desc.tail = 0; + dpivf->pending = 0; return 0; } @@ -174,7 +176,8 @@ cnxk_dmadev_start(struct rte_dma_dev *dev) struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private; dpivf->desc_idx = 0; - dpivf->num_words = 0; + dpivf->pending = 0; + dpivf->pnum_words = 0; roc_dpi_enable(&dpivf->rdpi); return 0; @@ -294,7 +297,7 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; comp_ptr->cdata = DPI_REQ_CDATA; header->cn9k.ptr = (uint64_t)comp_ptr; - STRM_INC(dpivf->conf.c_desc); + STRM_INC(dpivf->conf.c_desc, tail); header->cn9k.nfst = 1; header->cn9k.nlst = 1; @@ -322,17 +325,21 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, dpivf->cmd[num_words++] = lptr; rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words); - if (!rc) { - if (flags & RTE_DMA_OP_FLAG_SUBMIT) { - rte_wmb(); - plt_write64(num_words, - dpivf->rdpi.rbase + DPI_VDMA_DBELL); - dpivf->stats.submitted++; - } - dpivf->num_words += num_words; + if (unlikely(rc)) { + STRM_DEC(dpivf->conf.c_desc, tail); + return rc; } - return dpivf->desc_idx++; + if (flags & RTE_DMA_OP_FLAG_SUBMIT) { + rte_wmb(); + plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); + dpivf->stats.submitted++; + } else { + dpivf->pnum_words += num_words; + dpivf->pending++; + } + + return (dpivf->desc_idx++); } static int @@ -353,7 +360,7 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; comp_ptr->cdata = DPI_REQ_CDATA; header->cn9k.ptr = (uint64_t)comp_ptr; - STRM_INC(dpivf->conf.c_desc); + STRM_INC(dpivf->conf.c_desc, tail); /* * For inbound case, src pointers are last pointers. @@ -388,17 +395,21 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, } rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words); - if (!rc) { - if (flags & RTE_DMA_OP_FLAG_SUBMIT) { - rte_wmb(); - plt_write64(num_words, - dpivf->rdpi.rbase + DPI_VDMA_DBELL); - dpivf->stats.submitted += nb_src; - } - dpivf->num_words += num_words; + if (unlikely(rc)) { + STRM_DEC(dpivf->conf.c_desc, tail); + return rc; } - return (rc < 0) ? rc : dpivf->desc_idx++; + if (flags & RTE_DMA_OP_FLAG_SUBMIT) { + rte_wmb(); + plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); + dpivf->stats.submitted += nb_src; + } else { + dpivf->pnum_words += num_words; + dpivf->pending++; + } + + return (dpivf->desc_idx++); } static int @@ -417,7 +428,7 @@ cn10k_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; comp_ptr->cdata = DPI_REQ_CDATA; header->cn10k.ptr = (uint64_t)comp_ptr; - STRM_INC(dpivf->conf.c_desc); + STRM_INC(dpivf->conf.c_desc, tail); header->cn10k.nfst = 1; header->cn10k.nlst = 1; @@ -436,14 +447,18 @@ cn10k_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, dpivf->cmd[num_words++] = lptr; rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words); - if (!rc) { - if (flags & RTE_DMA_OP_FLAG_SUBMIT) { - rte_wmb(); - plt_write64(num_words, - dpivf->rdpi.rbase + DPI_VDMA_DBELL); - dpivf->stats.submitted++; - } - dpivf->num_words += num_words; + if (unlikely(rc)) { + STRM_DEC(dpivf->conf.c_desc, tail); + return rc; + } + + if (flags & RTE_DMA_OP_FLAG_SUBMIT) { + rte_wmb(); + plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); + dpivf->stats.submitted++; + } else { + dpivf->pnum_words += num_words; + dpivf->pending++; } return dpivf->desc_idx++; @@ -467,7 +482,7 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; comp_ptr->cdata = DPI_REQ_CDATA; header->cn10k.ptr = (uint64_t)comp_ptr; - STRM_INC(dpivf->conf.c_desc); + STRM_INC(dpivf->conf.c_desc, tail); header->cn10k.nfst = nb_src & 0xf; header->cn10k.nlst = nb_dst & 0xf; @@ -492,17 +507,21 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, } rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words); - if (!rc) { - if (flags & RTE_DMA_OP_FLAG_SUBMIT) { - rte_wmb(); - plt_write64(num_words, - dpivf->rdpi.rbase + DPI_VDMA_DBELL); - dpivf->stats.submitted += nb_src; - } - dpivf->num_words += num_words; + if (unlikely(rc)) { + STRM_DEC(dpivf->conf.c_desc, tail); + return rc; + } + + if (flags & RTE_DMA_OP_FLAG_SUBMIT) { + rte_wmb(); + plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); + dpivf->stats.submitted += nb_src; + } else { + dpivf->pnum_words += num_words; + dpivf->pending++; } - return (rc < 0) ? rc : dpivf->desc_idx++; + return (dpivf->desc_idx++); } static uint16_t @@ -566,14 +585,35 @@ cnxk_dmadev_completed_status(void *dev_private, uint16_t vchan, return cnt; } +static uint16_t +cnxk_damdev_burst_capacity(const void *dev_private, uint16_t vchan) +{ + const struct cnxk_dpi_vf_s *dpivf = (const struct cnxk_dpi_vf_s *)dev_private; + uint16_t burst_cap; + + RTE_SET_USED(vchan); + + burst_cap = dpivf->conf.c_desc.max_cnt - + ((dpivf->stats.submitted - dpivf->stats.completed) + dpivf->pending) + 1; + + return burst_cap; +} + static int cnxk_dmadev_submit(void *dev_private, uint16_t vchan __rte_unused) { struct cnxk_dpi_vf_s *dpivf = dev_private; + uint32_t num_words = dpivf->pnum_words; + + if (!dpivf->pnum_words) + return 0; rte_wmb(); - plt_write64(dpivf->num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); - dpivf->stats.submitted++; + plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); + + dpivf->stats.submitted += dpivf->pending; + dpivf->pnum_words = 0; + dpivf->pending = 0; return 0; } @@ -666,6 +706,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, dmadev->fp_obj->submit = cnxk_dmadev_submit; dmadev->fp_obj->completed = cnxk_dmadev_completed; dmadev->fp_obj->completed_status = cnxk_dmadev_completed_status; + dmadev->fp_obj->burst_capacity = cnxk_damdev_burst_capacity; if (pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CN10KA || pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CNF10KA || diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h index e1f5694f50..943e9e3013 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.h +++ b/drivers/dma/cnxk/cnxk_dmadev.h @@ -7,7 +7,8 @@ #define DPI_MAX_POINTER 15 #define DPI_QUEUE_STOP 0x0 #define DPI_QUEUE_START 0x1 -#define STRM_INC(s) ((s).tail = ((s).tail + 1) % (s).max_cnt) +#define STRM_INC(s, var) ((s).var = ((s).var + 1) & (s).max_cnt) +#define STRM_DEC(s, var) ((s).var = ((s).var - 1) == -1 ? (s).max_cnt : ((s).var - 1)) #define DPI_MAX_DESC 1024 /* Set Completion data to 0xFF when request submitted, @@ -37,7 +38,8 @@ struct cnxk_dpi_vf_s { struct cnxk_dpi_conf conf; struct rte_dma_stats stats; uint64_t cmd[DPI_MAX_CMD_SIZE]; - uint32_t num_words; + uint16_t pending; + uint16_t pnum_words; uint16_t desc_idx; }; -- 2.25.1