From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BC005430DF; Wed, 23 Aug 2023 13:16:15 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 62DCD4325B; Wed, 23 Aug 2023 13:16:13 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id D3E2542B8B; Wed, 23 Aug 2023 13:16:10 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37N72aRv013047; Wed, 23 Aug 2023 04:16:10 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=+++tQ1XlNrIvQqt8lXLqub1p4n8McQ0FQa7YGYcw2GM=; b=XhXEqxWOUiuhmbF63iRXobgUcoo46bEaC9Gpq1Z7TF77AzC/SqXi2Nk4jZRdczm6MCAa MWTzjXDql9Wz6QCEjP6hjkFcfi0K7ved0IFJLR7tqyJPM3CvB9hciQGTE0DfdxECSMc9 BO+bcNFOQOhQUlXPba/ZUQ0XoFZ4DaYioneFoOMA3qz7HhDBLBhKjtj8FNbMOLejEuAY UBrWKQgqf9AcN1S3fSnpwZEr8up2xnCq6YECOULSnbL+4GjBbq34wHSMRjEK5OW1b9G2 I7ygcs48k5ZsVvAo+otRMvkX6NaISbj/tQwTCm0LCWG70cPeCGzC1WKtPznA2QrJ1DcE JA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3sn20ctmds-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 23 Aug 2023 04:16:10 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 23 Aug 2023 04:16:08 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 23 Aug 2023 04:16:08 -0700 Received: from localhost.localdomain (unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 2A35D3F708A; Wed, 23 Aug 2023 04:16:05 -0700 (PDT) From: Amit Prakash Shukla To: Vamsi Attunuru CC: , , Amit Prakash Shukla , Subject: [PATCH v5 04/12] dma/cnxk: flag support for dma device Date: Wed, 23 Aug 2023 16:45:17 +0530 Message-ID: <20230823111525.3975662-4-amitprakashs@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230823111525.3975662-1-amitprakashs@marvell.com> References: <20230821174942.3165191-1-amitprakashs@marvell.com> <20230823111525.3975662-1-amitprakashs@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 9-HJhB22noZS5mfUqg6_hlokUVbxH77K X-Proofpoint-ORIG-GUID: 9-HJhB22noZS5mfUqg6_hlokUVbxH77K X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-08-23_06,2023-08-22_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Multiple call to configure, setup queues without stopping the device would leak the ring descriptor and hardware queue memory. This patch adds flags support to prevent configuring without stopping the device. Fixes: b56f1e2dad38 ("dma/cnxk: add channel operations") Cc: stable@dpdk.org Signed-off-by: Amit Prakash Shukla --- v2: - Fix for bugs observed in v1. - Squashed few commits. v3: - Resolved review suggestions. - Code improvement. v4: - Resolved checkpatch warnings. v5: - Updated commit message. - Split the commits. drivers/dma/cnxk/cnxk_dmadev.c | 32 +++++++++++++++++++++++++++++--- drivers/dma/cnxk/cnxk_dmadev.h | 5 +++++ 2 files changed, 34 insertions(+), 3 deletions(-) diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c index d8bd61a048..a7279fbd3a 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.c +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -45,14 +45,22 @@ cnxk_dmadev_configure(struct rte_dma_dev *dev, int rc = 0; RTE_SET_USED(conf); - RTE_SET_USED(conf); - RTE_SET_USED(conf_sz); RTE_SET_USED(conf_sz); + dpivf = dev->fp_obj->dev_private; + + if (dpivf->flag & CNXK_DPI_DEV_CONFIG) + return rc; + rc = roc_dpi_configure(&dpivf->rdpi); - if (rc < 0) + if (rc < 0) { plt_err("DMA configure failed err = %d", rc); + goto done; + } + dpivf->flag |= CNXK_DPI_DEV_CONFIG; + +done: return rc; } @@ -69,6 +77,9 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, RTE_SET_USED(vchan); RTE_SET_USED(conf_sz); + if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG) + return 0; + header->cn9k.pt = DPI_HDR_PT_ZBW_CA; switch (conf->direction) { @@ -109,6 +120,7 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, dpivf->conf.c_desc.head = 0; dpivf->conf.c_desc.tail = 0; dpivf->pending = 0; + dpivf->flag |= CNXK_DPI_VCHAN_CONFIG; return 0; } @@ -126,6 +138,10 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, RTE_SET_USED(vchan); RTE_SET_USED(conf_sz); + + if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG) + return 0; + header->cn10k.pt = DPI_HDR_PT_ZBW_CA; switch (conf->direction) { @@ -166,6 +182,7 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, dpivf->conf.c_desc.head = 0; dpivf->conf.c_desc.tail = 0; dpivf->pending = 0; + dpivf->flag |= CNXK_DPI_VCHAN_CONFIG; return 0; } @@ -175,11 +192,16 @@ cnxk_dmadev_start(struct rte_dma_dev *dev) { struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private; + if (dpivf->flag & CNXK_DPI_DEV_START) + return 0; + dpivf->desc_idx = 0; dpivf->pending = 0; dpivf->pnum_words = 0; roc_dpi_enable(&dpivf->rdpi); + dpivf->flag |= CNXK_DPI_DEV_START; + return 0; } @@ -190,6 +212,8 @@ cnxk_dmadev_stop(struct rte_dma_dev *dev) roc_dpi_disable(&dpivf->rdpi); + dpivf->flag &= ~CNXK_DPI_DEV_START; + return 0; } @@ -201,6 +225,8 @@ cnxk_dmadev_close(struct rte_dma_dev *dev) roc_dpi_disable(&dpivf->rdpi); roc_dpi_dev_fini(&dpivf->rdpi); + dpivf->flag = 0; + return 0; } diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h index 943e9e3013..573bcff165 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.h +++ b/drivers/dma/cnxk/cnxk_dmadev.h @@ -16,6 +16,10 @@ */ #define DPI_REQ_CDATA 0xFF +#define CNXK_DPI_DEV_CONFIG (1ULL << 0) +#define CNXK_DPI_VCHAN_CONFIG (1ULL << 1) +#define CNXK_DPI_DEV_START (1ULL << 2) + struct cnxk_dpi_compl_s { uint64_t cdata; void *cb_data; @@ -41,6 +45,7 @@ struct cnxk_dpi_vf_s { uint16_t pending; uint16_t pnum_words; uint16_t desc_idx; + uint16_t flag; }; #endif -- 2.25.1